rockchip: rk3368: move board_debug_uart_init() to rk3368.c

Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 9dea4ed994636a4665075b6bd9afe0fb006feff8..b055ed4aee00d09c39d4e70eb9546f0950c1a4ad 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -9,17 +9,9 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/io.h>
-#include <asm/arch-rockchip/cru_rk3368.h>
-#include <asm/arch-rockchip/grf_rk3368.h>
-#include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/periph.h>
-#include <asm/arch-rockchip/timer.h>
 #include <dm/pinctrl.h>
 
-void board_debug_uart_init(void)
-{
-}
-
 void board_init_f(ulong dummy)
 {
        struct udevice *pinctrl;

diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index 373f009414f7b00abd547ca98be76de3e2824ddd..dc65a021c8124f81eeaebcb4095210c960a4ce6a 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -13,7 +13,6 @@
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/cru_rk3368.h>
-#include <asm/arch-rockchip/grf_rk3368.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/timer.h>
 
@@ -79,42 +78,12 @@ static void sgrf_init(void)
        rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
 }
 
-void board_debug_uart_init(void)
-{
-       /*
-        * N.B.: This is called before the device-model has been
-        *       initialised. For this reason, we can not access
-        *       the GRF address range using the syscon API.
-        */
-       struct rk3368_grf * const grf =
-               (struct rk3368_grf * const)0xff770000;
-
-       enum {
-               GPIO2D1_MASK            = GENMASK(3, 2),
-               GPIO2D1_GPIO            = 0,
-               GPIO2D1_UART0_SOUT      = (1 << 2),
-
-               GPIO2D0_MASK            = GENMASK(1, 0),
-               GPIO2D0_GPIO            = 0,
-               GPIO2D0_UART0_SIN       = (1 << 0),
-       };
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-       /* Enable early UART0 on the RK3368 */
-       rk_clrsetreg(&grf->gpio2d_iomux,
-                    GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-       rk_clrsetreg(&grf->gpio2d_iomux,
-                    GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#endif
-}
-
 void board_init_f(ulong dummy)
 {
        struct udevice *dev;
        int ret;
 
-#define EARLY_UART
-#ifdef EARLY_UART
+#ifdef CONFIG_DEBUG_UART
        /*
         * Debug UART can be used from here if required:
         *

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 197f0c485ac7f6d3c0821c34bf1b9bafc5ec0c1f..1ed06c5352a07ebcbb3359249bd1840722b0e063 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -96,3 +96,34 @@ int arch_early_init_r(void)
        return mcu_init();
 }
 #endif
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+       /*
+        * N.B.: This is called before the device-model has been
+        *       initialised. For this reason, we can not access
+        *       the GRF address range using the syscon API.
+        */
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+       struct rk3368_grf * const grf =
+               (struct rk3368_grf * const)0xff770000;
+
+       enum {
+               GPIO2D1_MASK            = GENMASK(3, 2),
+               GPIO2D1_GPIO            = 0,
+               GPIO2D1_UART0_SOUT      = (1 << 2),
+
+               GPIO2D0_MASK            = GENMASK(1, 0),
+               GPIO2D0_GPIO            = 0,
+               GPIO2D0_UART0_SIN       = (1 << 0),
+       };
+
+       /* Enable early UART0 on the RK3368 */
+       rk_clrsetreg(&grf->gpio2d_iomux,
+                    GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+       rk_clrsetreg(&grf->gpio2d_iomux,
+                    GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+#endif