]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
renesas: Fix RPC-IF compatible values
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 29 Mar 2022 12:19:09 +0000 (14:19 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 2 Sep 2022 11:25:01 +0000 (13:25 +0200)
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
12 files changed:
arch/arm/dts/r7s72100-gr-peach-u-boot.dts
arch/arm/dts/r8a774c0-u-boot.dtsi
arch/arm/dts/r8a77950-u-boot.dtsi
arch/arm/dts/r8a77960-u-boot.dtsi
arch/arm/dts/r8a77965-u-boot.dtsi
arch/arm/dts/r8a77970-u-boot.dtsi
arch/arm/dts/r8a77980-u-boot.dtsi
arch/arm/dts/r8a77990-u-boot.dtsi
arch/arm/dts/r8a77995-u-boot.dtsi
arch/arm/dts/r8a779a0-u-boot.dtsi
drivers/mtd/renesas_rpc_hf.c
drivers/spi/renesas_rpc_spi.c

index 3f532eced23d354b6f1af558338a2d1f7c341a30..5b176a9acd75b62fb4ecbd6568872245f435cae8 100644 (file)
@@ -47,7 +47,7 @@
 
 
        rpc: spi@ee200000 {
-               compatible = "renesas,rpc-r7s72100", "renesas,rpc";
+               compatible = "renesas,r7s72100-rpc-if";
                reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
                bank-width = <2>;
                num-cs = <1>;
index f50816a360dc59122b6b336febaa37d6f706a11f..d29610676cacb7f69a2ca0baffb5cb683d484ae2 100644 (file)
@@ -11,7 +11,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0";
+                       compatible = "renesas,r8a774c0-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 5e449a3553cb9712dac0047fff161186b1bd5b55..2306c7bab8489eb446493e951d0bf27ae60a05d1 100644 (file)
@@ -14,7 +14,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a7795", "renesas,rpc";
+                       compatible = "renesas,r8a7795-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 9013c291f5ffca8a91924219d8a686117008cd99..f64e5a416b0c18a60f5ce7c87a7ad033196f67ca 100644 (file)
@@ -14,7 +14,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a7796", "renesas,rpc";
+                       compatible = "renesas,r8a7796-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index f3c99ac99cbc581aa5f3db75b1a7de6780c63687..c4abcc5a9b72b54474f32954aaf4ddd3c7912078 100644 (file)
@@ -14,7 +14,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a77965", "renesas,rpc";
+                       compatible = "renesas,r8a77965-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 904fc48b2282b52a3036693b27d7287c0af58ec3..614caa9e9c250f7a9daa7ec6ba2bf081b633ad67 100644 (file)
@@ -14,7 +14,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a77970", "renesas,rpc";
+                       compatible = "renesas,r8a77970-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 34d6fcd2f013d7629a3650e55e4d9cdc988732a4..54f01c926dcc1c14b7f13d794ff08be696b5a139 100644 (file)
@@ -14,7 +14,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a77980", "renesas,rpc";
+                       compatible = "renesas,r8a77980-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 8c75f62f5abec4cf708704faff8931a2e73226e6..50bbbe186471e1a5d9b7d2dda1647b707ff02742 100644 (file)
@@ -10,7 +10,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a77990", "renesas,rpc";
+                       compatible = "renesas,r8a77990-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index cd9466625e27d57c97e6cd42b8bebc7ea4254c78..347b59ac42c058b6e179a4ec8aaa0466db765eb7 100644 (file)
@@ -10,7 +10,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a77995", "renesas,rpc";
+                       compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
                        clocks = <&cpg CPG_MOD 917>;
                        bank-width = <2>;
index 83dbe3f20ef06824fdf9a37846b7f33369218437..9f2772a948581c011a56d08e60a9cb725d18c1d8 100644 (file)
@@ -10,7 +10,7 @@
 / {
        soc {
                rpc: spi@ee200000 {
-                       compatible = "renesas,rpc-r8a779a0", "renesas,rcar-gen3-rpc";
+                       compatible = "renesas,r8a779a0-rpc-if", "renesas,rcar-gen3-rpc-if";
                        reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
                        clocks = <&cpg CPG_MOD 629>;
                        bank-width = <2>;
index 2c61ce7b6e69326efcb03f8e8b42ee3e13c76128..aca7a6cdd25b54ebe3a7476e663486c2a2766176 100644 (file)
@@ -388,7 +388,8 @@ static int rpc_hf_probe(struct udevice *dev)
 }
 
 static const struct udevice_id rpc_hf_ids[] = {
-       { .compatible = "renesas,rpc" },
+       { .compatible = "renesas,r7s72100-rpc-if" },
+       { .compatible = "renesas,rcar-gen3-rpc-if" },
        {}
 };
 
index 26b6aa85c92bb711f1e25d3bf6ac0449505678d2..cb2b8fb64def8266a5f651de0709d519ff54c7f7 100644 (file)
@@ -449,13 +449,8 @@ static const struct dm_spi_ops rpc_spi_ops = {
 };
 
 static const struct udevice_id rpc_spi_ids[] = {
-       { .compatible = "renesas,rpc-r7s72100" },
-       { .compatible = "renesas,rpc-r8a7795" },
-       { .compatible = "renesas,rpc-r8a7796" },
-       { .compatible = "renesas,rpc-r8a77965" },
-       { .compatible = "renesas,rpc-r8a77970" },
-       { .compatible = "renesas,rpc-r8a77995" },
-       { .compatible = "renesas,rcar-gen3-rpc" },
+       { .compatible = "renesas,r7s72100-rpc-if" },
+       { .compatible = "renesas,rcar-gen3-rpc-if" },
        { }
 };