imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi
index c61c6de935fb53a010f683f12a8383f760bac443..68978a0413ec7890ff278ddd3d87c965bce5a1c3 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi
@@ -72,3 +72,7 @@
 &wdog1 {
        u-boot,dm-spl;
 };
+
+&pinctrl_wdog {
+       u-boot,dm-spl;
+};

diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 4f23da356763625194e482075408adb72d8caa1f..358195538797e27ffa80e8208a32e6dbb4421e0e 100644 (file)
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -110,6 +110,10 @@
        u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+       u-boot,dm-spl;
+};
+
 &binman {
        u-boot-spl-ddr {
                align = <4>;

diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi
index 37f3edc981777fc526725c89b68598acd31c2f53..96b9fa89cf46bfa92ee4ad4b232b7c7a78cdd57e 100644 (file)
--- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi
@@ -72,3 +72,7 @@
 &wdog1 {
        u-boot,dm-spl;
 };
+
+&pinctrl_wdog {
+       u-boot,dm-spl;
+};

diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 6e6ce015f28a47c5c314053222561c2c5f500a7f..4c0feb4381c9f2e54bd3dd386166c4755ed4386c 100644 (file)
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -87,33 +87,6 @@ static void spl_dram_init(int size)
        ddr_init(dram_timing);
 }
 
-#define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-#ifdef CONFIG_IMX8MM
-static iomux_v3_cfg_t const wdog_pads[] = {
-       IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#elif CONFIG_IMX8MN
-static const iomux_v3_cfg_t wdog_pads[] = {
-       IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#elif CONFIG_IMX8MP
-static const iomux_v3_cfg_t wdog_pads[] = {
-       MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#endif
-
-int board_early_init_f(void)
-{
-       struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-       imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-       set_wdog_reset(wdog);
-
-       return 0;
-}
-
 /*
  * Model specific PMIC adjustments necessary prior to DRAM init
  *
@@ -253,8 +226,6 @@ void board_init_f(ulong dummy)
 
        init_uart_clk(1);
 
-       board_early_init_f();
-
        timer_init();
 
        /* Clear the BSS. */