ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1

Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"

This patch solve the eMMC detection issue for command "mmc dev 1".

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-pinctrl.dtsi
index 2d73d502d9e5ee4c03193bb1878e50ec25f8b34a..0d53396119f8e0ea9227f95d62ef22fe0712f10c 100644 (file)
--- a/arch/arm/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
@@ -812,31 +812,80 @@
                        };
 
                        sdmmc2_b4_pins_a: sdmmc2-b4-0 {
-                               pins {
+                               pins1 {
                                        pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
                                                 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
                                                 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
                                                 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
-                                                <STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
                                                 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
-                                       slew-rate = <3>;
+                                       slew-rate = <1>;
+                                       drive-push-pull;
+                                       bias-pull-up;
+                               };
+                               pins2 {
+                                       pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
+                                       slew-rate = <2>;
                                        drive-push-pull;
                                        bias-pull-up;
                                };
                        };
 
+                       sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
+                               pins1 {
+                                       pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
+                                                <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
+                                                <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
+                                                <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
+                                       slew-rate = <1>;
+                                       drive-push-pull;
+                                       bias-pull-up;
+                               };
+                               pins2 {
+                                       pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
+                                       slew-rate = <2>;
+                                       drive-push-pull;
+                                       bias-pull-up;
+                               };
+                               pins3 {
+                                       pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
+                                       slew-rate = <1>;
+                                       drive-open-drain;
+                                       bias-pull-up;
+                               };
+                       };
+
+                       sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
+                                                <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
+                                                <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
+                                                <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
+                                                <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
+                                                <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
+                               };
+                       };
+
                        sdmmc2_d47_pins_a: sdmmc2-d47-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
                                                 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
                                                 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
                                                 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
-                                       slew-rate = <3>;
+                                       slew-rate = <1>;
                                        drive-push-pull;
                                        bias-pull-up;
                                };
                        };
 
+                       sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
+                                                <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
+                                                <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
+                                                <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
+                               };
+                       };
+
                        spdifrx_pins_a: spdifrx-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */

diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
index 1ff681afb8705f94824ae9fb39911acd8025ed55..1104a70a65c136908ef9239cb3feb551f348b8f4 100644 (file)
--- a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -155,7 +155,10 @@
 
 &sdmmc2_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };

diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 4953a0db5552c95fd9db52fa4cf331c1db2f05b0..b2ac49472a73017cf1818f9bae64987d416fca71 100644 (file)
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -174,7 +174,10 @@
 
 &sdmmc2_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };

diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts
index 73d07cf42f1c19633639570b1b45559cfad572ec..bc4d7e1ab5dbe33f0a2a5eeeea56458a418d4e77 100644 (file)
--- a/arch/arm/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/dts/stm32mp157c-ed1.dts
@@ -294,15 +294,18 @@
 };
 
 &sdmmc2 {
+       pinctrl-names = "default", "opendrain", "sleep";
        pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
+       pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
+       pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
        non-removable;
        no-sd;
        no-sdio;
-       st,sig-dir;
        st,neg-edge;
        bus-width = <8>;
        vmmc-supply = <&v3v3>;
-       vqmmc-supply = <&vdd>;
+       vqmmc-supply = <&v3v3>;
+       mmc-ddr-3_3v;
        status = "okay";
 };