]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
x86: apl: Move priv/plat structs to headers
authorSimon Glass <sjg@chromium.org>
Sat, 19 Dec 2020 17:39:57 +0000 (10:39 -0700)
committerSimon Glass <sjg@chromium.org>
Tue, 5 Jan 2021 19:24:41 +0000 (12:24 -0700)
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/apollolake/hostbridge.c
arch/x86/cpu/apollolake/pmc.c
arch/x86/include/asm/arch-apollolake/gpio.h
arch/x86/include/asm/arch-apollolake/hostbridge.h [new file with mode: 0644]
arch/x86/include/asm/arch-apollolake/pmc.h [new file with mode: 0644]
drivers/pinctrl/intel/pinctrl_apl.c

index 9ec2309d086c11c056796513133e5d6bfbff2110..9decab7aa332f18f70ac9a3334c8f7a9262f7114 100644 (file)
@@ -24,6 +24,7 @@
 #include <asm/io.h>
 #include <asm/pci.h>
 #include <asm/arch/acpi.h>
+#include <asm/arch/hostbridge.h>
 #include <asm/arch/systemagent.h>
 #include <dt-bindings/sound/nhlt.h>
 #include <dm/acpi.h>
@@ -41,25 +42,6 @@ enum {
        TOLUD                   = 0xbc,
 };
 
-/**
- * struct apl_hostbridge_plat - platform data for hostbridge
- *
- * @dtplat: Platform data for of-platdata
- * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1)
- * @early_pads_count: Number of pads to process
- * @pciex_region_size: BAR length in bytes
- * @bdf: Bus/device/function of hostbridge
- */
-struct apl_hostbridge_plat {
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
-       struct dtd_intel_apl_hostbridge dtplat;
-#endif
-       u32 *early_pads;
-       int early_pads_count;
-       uint pciex_region_size;
-       pci_dev_t bdf;
-};
-
 #if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE)
 static const struct nhlt_format_config dmic_1ch_formats[] = {
        /* 48 KHz 16-bits per sample. */
index e033baf1205ed08eef5b9ac3c42a7888ab3f68c2..e23d38ea0729ac8b7f36efbf187e3bdb51173e5a 100644 (file)
@@ -16,6 +16,7 @@
 #include <acpi/acpi_s3.h>
 #include <asm/io.h>
 #include <asm/pci.h>
+#include <asm/arch/pmc.h>
 #include <linux/bitops.h>
 #include <power/acpi_pmc.h>
 
@@ -53,13 +54,6 @@ enum {
        CF9_GLB_RST     = 1 << 20,
 };
 
-struct apl_pmc_plat {
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
-       struct dtd_intel_apl_pmc dtplat;
-#endif
-       pci_dev_t bdf;
-};
-
 static int apl_pmc_fill_power_state(struct udevice *dev)
 {
        struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
index ab5860c0fd0ebd62c0bf447db24093e090111634..762160da88203907e5cb5837239fb1001178a4c9 100644 (file)
 /* This is needed by ACPI */
 #define GPIO_NUM_PAD_CFG_REGS   2 /* DW0, DW1 */
 
+#ifndef __ASSEMBLY__
+
+#include <dt-structs.h>
+
+/**
+ * struct apl_gpio_plat - platform data for each device
+ *
+ * @dtplat: of-platdata data from C struct
+ */
+struct apl_gpio_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+       /* Put this first since driver model will copy the data here */
+       struct dtd_intel_apl_pinctrl dtplat;
+#endif
+};
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* _ASM_ARCH_GPIO_H_ */
diff --git a/arch/x86/include/asm/arch-apollolake/hostbridge.h b/arch/x86/include/asm/arch-apollolake/hostbridge.h
new file mode 100644 (file)
index 0000000..f4dce0d
--- /dev/null
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#ifndef _ASM_ARCH_HOSTBRIDGE_H_
+#define _ASM_ARCH_HOSTBRIDGE_H_
+
+/**
+ * struct apl_hostbridge_plat - platform data for hostbridge
+ *
+ * @dtplat: Platform data for of-platdata
+ * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1)
+ * @early_pads_count: Number of pads to process
+ * @pciex_region_size: BAR length in bytes
+ * @bdf: Bus/device/function of hostbridge
+ */
+struct apl_hostbridge_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+       struct dtd_intel_apl_hostbridge dtplat;
+#endif
+       u32 *early_pads;
+       int early_pads_count;
+       uint pciex_region_size;
+       pci_dev_t bdf;
+};
+
+#endif /* _ASM_ARCH_HOSTBRIDGE_H_ */
diff --git a/arch/x86/include/asm/arch-apollolake/pmc.h b/arch/x86/include/asm/arch-apollolake/pmc.h
new file mode 100644 (file)
index 0000000..23ac8fe
--- /dev/null
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#ifndef ASM_ARCH_PMC_H
+#define ASM_ARCH_PMC_H
+
+struct apl_pmc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+       struct dtd_intel_apl_pmc dtplat;
+#endif
+       pci_dev_t bdf;
+};
+
+#endif /* ASM_ARCH_PMC_H */
index b512a85f3e6a186c56171842821add4d30951000..acaa55d2e7fe030a2336dd82ffe227274359c122 100644 (file)
 #include <asm-generic/gpio.h>
 #include <asm/intel_pinctrl_defs.h>
 
-/**
- * struct apl_gpio_plat - platform data for each device
- *
- * @dtplat: of-platdata data from C struct
- */
-struct apl_gpio_plat {
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
-       /* Put this first since driver model will copy the data here */
-       struct dtd_intel_apl_pinctrl dtplat;
-#endif
-};
-
 static const struct reset_mapping rst_map[] = {
        { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 },
        { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 },