rockchip: dts: rk3399: Sync rk3399-opp from Linux

Sync rk3399-opp.dtsi from Linux.

Linux commit details about the rk3399-opp.dtsi sync:
"arm64: dts: rockchip: use SPDX-License-Identifier"
(sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3399-opp.dtsi b/arch/arm/dts/rk3399-opp.dtsi
new file mode 100644 (file)
index 0000000..d6f1095
--- /dev/null
+++ b/arch/arm/dts/rk3399-opp.dtsi
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/ {
+       cluster0_opp: opp-table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <408000000>;
+                       opp-microvolt = <800000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <816000000>;
+                       opp-microvolt = <850000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <925000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <1000000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1416000000>;
+                       opp-microvolt = <1125000>;
+               };
+       };
+
+       cluster1_opp: opp-table1 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <408000000>;
+                       opp-microvolt = <800000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <816000000>;
+                       opp-microvolt = <825000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <875000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1416000000>;
+                       opp-microvolt = <1025000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <1608000000>;
+                       opp-microvolt = <1100000>;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <1200000>;
+               };
+       };
+
+       gpu_opp_table: opp-table2 {
+               compatible = "operating-points-v2";
+
+               opp00 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <297000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <825000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <875000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <925000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1100000>;
+               };
+       };
+};
+
+&cpu_l0 {
+       operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l1 {
+       operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l2 {
+       operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l3 {
+       operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_b0 {
+       operating-points-v2 = <&cluster1_opp>;
+};
+
+&cpu_b1 {
+       operating-points-v2 = <&cluster1_opp>;
+};
+
+&gpu {
+       operating-points-v2 = <&gpu_opp_table>;
+};