lpsc_transition(id, 0x01);
}
+void lpsc_disable(unsigned int id)
+{
+ lpsc_transition(id, 0x0);
+}
+
/* Not all DaVinci chips have a DSP power domain. */
#ifdef CONFIG_SOC_DM644X
/*
- * da8xx.h -- TI's DA8xx platform specific usb wrapper definitions.
+ * da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions.
*
* Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
*
#include <asm/arch/hardware.h>
#include <asm/arch/gpio.h>
-#include "musb_core.h"
/* Base address of da8xx usb0 wrapper */
#define DA8XX_USB_OTG_BASE 0x01E00000
#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
#define DA8XX_USB_VBUS_GPIO (1 << 15)
+
+int usb_phy_on(void);
+void usb_phy_off(void);
+
#endif /* __DA8XX_MUSB_H__ */
void lpsc_on(unsigned int id);
void lpsc_syncreset(unsigned int id);
+void lpsc_disable(unsigned int id);
void dsp_on(void);
void davinci_enable_uart0(void);
* Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2004 Texas Instruments.
+ * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
*
* ----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/pinmux_defs.h>
+#include <asm/arch/da8xx-usb.h>
#include <ns16550.h>
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+
+int usb_phy_on(void)
+{
+ u32 timeout;
+ u32 cfgchip2;
+
+ cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+
+ cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
+ CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
+ CFGCHIP2_USB1PHYCLKMUX);
+ cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
+ CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
+ CFGCHIP2_USB1SUSPENDM;
+
+ writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+
+ /* wait until the usb phy pll locks */
+ timeout = DA8XX_USB_OTG_TIMEOUT;
+ while (timeout--)
+ if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
+ return 1;
+
+ /* USB phy was not turned on */
+ return 0;
+}
+
+void usb_phy_off(void)
+{
+ u32 cfgchip2;
+
+ /*
+ * Power down the on-chip PHY.
+ */
+ cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+ cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
+ cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
+ writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+}
# ohci
COBJS-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o
+COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o
--- /dev/null
+/*
+ * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+
+#include <asm/arch/da8xx-usb.h>
+
+int usb_cpu_init(void)
+{
+ /* enable psc for usb2.0 */
+ lpsc_on(DAVINCI_LPSC_USB20);
+
+ /* enable psc for usb1.0 */
+ lpsc_on(DAVINCI_LPSC_USB11);
+
+ /* start the on-chip usb phy and its pll */
+ if (usb_phy_on())
+ return 0;
+
+ return 1;
+}
+
+int usb_cpu_stop(void)
+{
+ usb_phy_off();
+
+ /* turn off the usb clock and assert the module reset */
+ lpsc_disable(DAVINCI_LPSC_USB11);
+ lpsc_disable(DAVINCI_LPSC_USB20);
+
+ return 0;
+}
+
+int usb_cpu_init_fail(void)
+{
+ return usb_cpu_stop();
+}
*/
#include <common.h>
-#include "da8xx.h"
+#include "musb_core.h"
+#include <asm/arch/da8xx-usb.h>
/* MUSB platform configuration */
struct musb_config musb_cfg = {
#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
#endif /* CONFIG_SYS_USE_NAND */
+/* USB Configs */
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_OHCI_DA8XX
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
+
/*
* U-Boot general configuration
*/
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_EXT2
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS