Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
*/
setbits_le32(®->pllctl, PLLCTL_PLLEN);
-
/*
* clear EMIFA and EMIFB clock source settings, let them
* run off SYSCLK
#define PSC_REG_MDSTAT(x) (0x800 + (4 * (x)))
#define PSC_REG_MDCTL(x) (0xa00 + (4 * (x)))
-
static inline u32 _boot_bit_mask(u32 x, u32 y)
{
u32 val = (1 << (x - y + 1)) - 1;
struct mpax ses[16][8];
};
-
void msmc_share_all_segments(int priv_id)
{
struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE;
/* Get the frequency */
dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
-
if (i2c_probe(TPS65217_CHIP_PM))
return;
{
u32 i, max = 100;
-
/* Clock modules that need to be put in SW_DISABLE */
for (i = 0; (i < max) && clk_modules_disable && clk_modules_disable[i];
i++)
CTRL_SYSBOOT_15_14_SHIFT);
}
-
#ifdef CONFIG_DISPLAY_CPUINFO
static char *cpu_revs[] = {
"1.0",
{
u32 i, max = 100;
-
/* Clock modules that need to be put in SW_DISABLE */
for (i = 0; (i < max) && clk_modules_disable[i]; i++)
disable_clock_module(clk_modules_disable[i],
writel(WD_UNLOCK2, &wd2_base->wspr);
}
-
/*
* This function finds the SDRAM size available in the system
* based on DMM section configurations
return total_size;
}
-
/*
* Routine: dram_init
* Description: sets uboots idea of sdram size
asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
}
-
#ifndef CONFIG_SYS_L2CACHE_OFF
static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
{