]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: meson: add A1 support
authorIgor Prusov <ivprusov@sberdevices.ru>
Fri, 5 May 2023 12:56:37 +0000 (15:56 +0300)
committerNeil Armstrong <neil.armstrong@linaro.org>
Wed, 28 Jun 2023 08:05:34 +0000 (10:05 +0200)
Add support for Amlogic A1 SoC family.

Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Signed-off-by: Evgeny Bachinin <eabachinin@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230505125639.3605-4-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm/include/asm/arch-meson/a1.h [new file with mode: 0644]
arch/arm/mach-meson/Kconfig
arch/arm/mach-meson/Makefile
arch/arm/mach-meson/board-a1.c [new file with mode: 0644]
include/configs/meson64.h

diff --git a/arch/arm/include/asm/arch-meson/a1.h b/arch/arm/include/asm/arch-meson/a1.h
new file mode 100644 (file)
index 0000000..86d1a68
--- /dev/null
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2023 SberDevices, Inc.
+ * Author: Igor Prusov <ivprusov@sberdevices.ru>
+ */
+
+#ifndef __MESON_A1_H__
+#define __MESON_A1_H__
+
+#define A1_SYSCTRL_BASE                        0xfe005800
+
+/* SYSCTRL registers */
+#define A1_SYSCTRL_ADDR(off)           (A1_SYSCTRL_BASE + ((off) << 2))
+
+#define A1_SYSCTRL_SEC_STATUS_REG4     A1_SYSCTRL_ADDR(0xc4)
+
+#define A1_SYSCTRL_MEM_SIZE_MASK       0xFFFF0000
+#define A1_SYSCTRL_MEM_SIZE_SHIFT      16
+
+#endif /* __MESON_A1_H__ */
index 6cba2c40ddaaf7e004c2fdcb1dc2d516284c4dba..519ed563c05381daeb0fdba72bf38acc3c55229e 100644 (file)
@@ -51,6 +51,12 @@ config MESON_G12A
        help
          Select this if your SoC is an S905X/D2
 
+config MESON_A1
+       bool "A1"
+       select MESON64_COMMON
+       help
+         Select this if your SoC is an A113L
+
 endchoice
 
 config SYS_SOC
index a9e4046f809407db5ae46f328496697fd554a800..535b0878b9105e7a83729bea65fa4cd70cd4beac 100644 (file)
@@ -6,3 +6,4 @@ obj-y += board-common.o sm.o board-info.o
 obj-$(CONFIG_MESON_GX) += board-gx.o
 obj-$(CONFIG_MESON_AXG) += board-axg.o
 obj-$(CONFIG_MESON_G12A) += board-g12a.o
+obj-$(CONFIG_MESON_A1) += board-a1.o
diff --git a/arch/arm/mach-meson/board-a1.c b/arch/arm/mach-meson/board-a1.c
new file mode 100644 (file)
index 0000000..967bb67
--- /dev/null
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2023 SberDevices, Inc.
+ */
+
+#include <common.h>
+#include <asm/arch/a1.h>
+#include <asm/arch/boot.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <linux/compiler.h>
+#include <linux/sizes.h>
+
+phys_size_t get_effective_memsize(void)
+{
+       return ((readl(A1_SYSCTRL_SEC_STATUS_REG4) & A1_SYSCTRL_MEM_SIZE_MASK)
+               >> A1_SYSCTRL_MEM_SIZE_SHIFT) * SZ_1M;
+}
+
+void meson_init_reserved_memory(__maybe_unused void *fdt)
+{
+}
+
+int meson_get_boot_device(void)
+{
+       return -ENOSYS;
+}
+
+static struct mm_region a1_mem_map[] = {
+       {
+               .virt = 0x00000000UL,
+               .phys = 0x00000000UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                       PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x80000000UL,
+               .phys = 0x80000000UL,
+               .size = 0x7FE00000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                       PTE_BLOCK_NON_SHARE |
+                       PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /*
+                * This mem region contains in/out shared memory with bl31,
+                * hence it's marked as NORMAL memory type
+                */
+               .virt = 0xFFE00000UL,
+               .phys = 0xFFE00000UL,
+               .size = 0x00200000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                       PTE_BLOCK_INNER_SHARE
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = a1_mem_map;
index 9244601284b8e3d066ac2bf7b30c0a9e114c8c25..801cdae47081e6136284cca84bbe383072c0e742 100644 (file)
@@ -11,6 +11,9 @@
 #if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
 #define GICD_BASE                      0xffc01000
 #define GICC_BASE                      0xffc02000
+#elif defined(CONFIG_MESON_A1)
+#define GICD_BASE                      0xff901000
+#define GICC_BASE                      0xff902000
 #else /* MESON GXL and GXBB */
 #define GICD_BASE                      0xc4301000
 #define GICC_BASE                      0xc4302000