spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion

If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause
issues in future command reads. This issue came to light when some flash
reads in STIG mode were coming back dirty.

Co-developed-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 4c055a05807ede16f6d49cb1e91acb5fa339dde7..9ce2c0f254f3410a3b6373543698d9f6c6c5b09d 100644 (file)
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -376,6 +376,9 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg)
        if (!cadence_qspi_wait_idle(reg_base))
                return -EIO;
 
+       /* Flush the CMDCTRL reg after the execution */
+       writel(0, reg_base + CQSPI_REG_CMDCTRL);
+
        return 0;
 }