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imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
authorYe Li <ye.li@nxp.com>
Tue, 31 Jan 2023 08:42:15 +0000 (16:42 +0800)
committerStefano Babic <sbabic@denx.de>
Wed, 29 Mar 2023 18:15:42 +0000 (20:15 +0200)
commit237ce9b6c4889ce6a493244d71c71fd99d38d034
treec801f64fa1cbd63aff0d9979622bc9a922a3ea59tree | snapshot
parentbf9866d265fa1d727a675f40c036cd14408ad8d4commit | diff
imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD

iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/mach-imx/imx8ulp/rdc.c diff | blob | history
My U-Boot fork