From e10d114279f01899c7eb47f5977dbceca6b6efaf Mon Sep 17 00:00:00 2001
From: Ran Wang <ran.wang_1@nxp.com>
Date: Mon, 4 Sep 2017 18:46:54 +0800
Subject: [PATCH] armv7: Add workaround for USB erratum A-008997
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
---
arch/arm/cpu/armv7/ls102xa/Kconfig | 6 ++++++
arch/arm/cpu/armv7/ls102xa/soc.c | 13 +++++++++++++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +++
3 files changed, 22 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index a9fc65ff11..a84cda8592 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -2,6 +2,7 @@ config ARCH_LS1021A
bool
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009798
@@ -60,6 +61,11 @@ config SYS_CCI400_OFFSET
Offset for CCI400 base.
CCI400 base addr = CCSRBAR + CCI400_OFFSET
+config SYS_FSL_ERRATUM_A008997
+ bool
+ help
+ Workaround for USB PHY erratum A008997
+
config SYS_FSL_ERRATUM_A009008
bool
help
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 4f94df79f8..07b525d7a3 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -81,6 +81,18 @@ static void erratum_a009798(void)
#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
}
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+ u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+ clrsetbits_be32(scfg + SCFG_USB3PRM2CR / 4,
+ SCFG_USB_PCSTXSWINGFULL_MASK,
+ SCFG_USB_PCSTXSWINGFULL_VAL);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
+
void s_init(void)
{
}
@@ -171,6 +183,7 @@ int arch_soc_init(void)
/* Erratum */
erratum_a009008();
erratum_a009798();
+ erratum_a008997();
return 0;
}
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index bc5125d833..25e65cbd26 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -178,6 +178,9 @@ struct ccsr_gur {
#define SCFG_USB3PRM1CR 0x070
#define SCFG_USB_TXVREFTUNE 0x9
#define SCFG_USB_SQRXTUNE_MASK 0x7
+#define SCFG_USB3PRM2CR 0x074
+#define SCFG_USB_PCSTXSWINGFULL_MASK 0x0000FE00
+#define SCFG_USB_PCSTXSWINGFULL_VAL 0x00008E00
/* Supplemental Configuration Unit */
struct ccsr_scfg {
--
2.39.5