From bf468e5e1ae71c97f01a1ef2e97e18bd5bca40ce Mon Sep 17 00:00:00 2001
From: Thierry Reding <treding@nvidia.com>
Date: Mon, 15 Apr 2019 11:32:16 +0200
Subject: [PATCH] ARM: tegra: Remove disp1 clock initialization on Tegra210
pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
---
arch/arm/mach-tegra/tegra210/clock.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 0d7cafea20..b240860f08 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
--
2.39.5