From bb310d462bbe2be9be867f969e7a2b60ae90e785 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Mon, 22 Nov 2004 22:20:07 +0000
Subject: [PATCH] Fix smc91111 ethernet driver for Xaeniax board (need to
handle unaligned tail part specially).
---
CHANGELOG | 3 +++
drivers/smc91111.c | 20 ++++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/CHANGELOG b/CHANGELOG
index 1d34dfffb0..13382605e5 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.1:
======================================================================
+* Fix smc91111 ethernet driver for Xaeniax board (need to handle
+ unaligned tail part specially).
+
* Update for AT91RM9200DK and CMC_PU2 boards:
- Enable booting directly from flash
- fix CMC_PU2 flash driver
diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 69cbb1713d..060da8ff2a 100644
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -683,19 +683,39 @@ again:
*/
#ifdef USE_32_BIT
SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
+#ifndef CONFIG_XAENIAX
if (length & 0x2)
SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
SMC91111_DATA_REG);
+#else
+ /* On XANEIAX, we can only use 32-bit writes, so we need to handle
+ * unaligned tail part specially. The standard code doesn't work.
+ */
+ if ((length & 3) == 3) {
+ u16 * ptr = (u16*) &buf[length-3];
+ SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16),
+ SMC91111_DATA_REG);
+ } else if ((length & 2) == 2) {
+ u16 * ptr = (u16*) &buf[length-2];
+ SMC_outl(*ptr, SMC91111_DATA_REG);
+ } else if (length & 1) {
+ SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG);
+ } else {
+ SMC_outl(0, SMC91111_DATA_REG);
+ }
+#endif
#else
SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
#endif /* USE_32_BIT */
+#ifndef CONFIG_XAENIAX
/* Send the last byte, if there is one. */
if ((length & 1) == 0) {
SMC_outw (0, SMC91111_DATA_REG);
} else {
SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
}
+#endif
/* and let the chipset deal with it */
SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
--
2.39.5