From b3d2cde7a3aa1e83b7968cdff929e52c8cc617bb Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Wed, 9 Jan 2008 20:57:40 +0300
Subject: [PATCH] mpc83xx: add "fsl, qe" compatible fixups

New device trees will use "fsl,qe" compatible properties.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
---
 cpu/mpc83xx/fdt.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c
index f21c54e80b..909171fd4f 100644
--- a/cpu/mpc83xx/fdt.c
+++ b/cpu/mpc83xx/fdt.c
@@ -52,6 +52,12 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 		"bus-frequency", gd->qe_clk, 1);
 	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
 		"brg-frequency", gd->brg_clk, 1);
+	do_fixup_by_compat_u32(blob, "fsl,qe",
+		"clock-frequency", gd->qe_clk, 1);
+	do_fixup_by_compat_u32(blob, "fsl,qe",
+		"bus-frequency", gd->qe_clk, 1);
+	do_fixup_by_compat_u32(blob, "fsl,qe",
+		"brg-frequency", gd->brg_clk, 1);
 #endif
 
 #ifdef CFG_NS16550
-- 
2.39.5