From 8fbf678ba028e2e1d346190e3101d1a475f11b63 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann <soren.brinkmann@xilinx.com> Date: Wed, 27 Jul 2016 14:12:03 -0700 Subject: [PATCH] ARM64: zynqmp: Fix stack pointer initialization This partly reverts commit: "ARM64: zynqmp: Add SPL support support" (sha1: e6a9ed04e78cf87ec97e306fa4e7a1669ef98df6) Stack can rewrite ATF code. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- include/configs/xilinx_zynqmp.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 65f768da73..297cc4d5f3 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -41,7 +41,7 @@ # define CONFIG_IDENT_STRING " Xilinx ZynqMP" #endif -#define CONFIG_SYS_INIT_SP_ADDR 0xfffffffc +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ #if !defined(COUNTER_FREQUENCY) @@ -256,6 +256,7 @@ #endif #define CONFIG_SPL_TEXT_BASE 0xfffc0000 +#define CONFIG_SPL_STACK 0xfffffffc #define CONFIG_SPL_MAX_SIZE 0x20000 /* Just random location in OCM */ -- 2.39.5