From 8e5a4e6f0ec7d475fc32b7f8083c9aefb9723fad Mon Sep 17 00:00:00 2001
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Date: Thu, 2 Mar 2017 14:40:51 +0530
Subject: [PATCH] arm64: zynqmp: Add support reading SoC revision using nvmem
driver in dwc3
This patch adds support for reading silicon revision using zynqmp nvmem
driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/zynqmp.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 10a53bb9f0..dce5da4e06 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1022,6 +1022,8 @@
iommus = <&smmu 0x860>;
power-domains = <&pd_usb0>;
ranges;
+ nvmem-cells = <&soc_revision>;
+ nvmem-cell-names = "soc_revision";
dwc3_0: dwc3@fe200000 {
compatible = "snps,dwc3";
@@ -1045,6 +1047,8 @@
iommus = <&smmu 0x861>;
power-domains = <&pd_usb1>;
ranges;
+ nvmem-cells = <&soc_revision>;
+ nvmem-cell-names = "soc_revision";
dwc3_1: dwc3@fe300000 {
compatible = "snps,dwc3";
--
2.39.5