From 6c22742d3defa76be00b4d3b5b49911fa63ffa0a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada <yamada.masahiro@socionext.com> Date: Sat, 8 Oct 2016 13:25:23 +0900 Subject: [PATCH] ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoC For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- arch/arm/mach-uniphier/clk/pll-ld11.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-uniphier/clk/pll-ld11.c b/arch/arm/mach-uniphier/clk/pll-ld11.c index 8a4a748cfd..7746deb72d 100644 --- a/arch/arm/mach-uniphier/clk/pll-ld11.c +++ b/arch/arm/mach-uniphier/clk/pll-ld11.c @@ -23,6 +23,7 @@ void uniphier_ld11_pll_init(void) uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL); uniphier_ld20_sscpll_ssc_en(SC_MPLLCTRL); uniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL); + uniphier_ld20_sscpll_ssc_en(SC_DPLLCTRL); uniphier_ld20_vpll27_init(SC_VPLL27FCTRL); uniphier_ld20_vpll27_init(SC_VPLL27ACTRL); -- 2.39.5