From 562f8d5b36e4d35365aa9a545e4d11b5c2557ec1 Mon Sep 17 00:00:00 2001
From: Marcin Wojtas <mw@semihalf.com>
Date: Fri, 30 Apr 2021 15:26:30 +0200
Subject: [PATCH] spi: kirkwood: prevent configuring speed exceeding max
controller freq
This patch adds a limitation in the kirkwood_spi driver
set_speed hook, which prevents setting too high transfer
speed.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
---
drivers/spi/kirkwood_spi.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 3dc62f351a..063ed5f35a 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -110,10 +110,17 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen,
static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
{
struct mvebu_spi_plat *plat = dev_get_plat(bus);
+ struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
struct kwspi_registers *reg = plat->spireg;
u32 data, divider;
unsigned int spr, sppr;
+ if (hz > spi->max_hz) {
+ debug("%s: limit speed to the max_hz of the bus %d\n",
+ __func__, spi->max_hz);
+ hz = spi->max_hz;
+ }
+
/*
* Calculate spi clock prescaller using max_hz.
* SPPR is SPI Baud Rate Pre-selection, it holds bits 5 and 7:6 in
--
2.39.5