From 4aceaec585d925eed468c3bd25fdcdfd7568033e Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= Date: Thu, 7 Apr 2022 12:16:15 +0200 Subject: [PATCH] board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit As written in comment, P2020 has two possible SD switch configurations. Extend code to detect both of them. Signed-off-by: Pali Rohár Reviewed-by: Priyanka Jain --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4 ++++ include/configs/p1_p2_rdb_pc.h | 3 ++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 1e6dfe87d8..dde0c1dcd2 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -216,6 +216,10 @@ int checkboard(void) puts("rom_loc: "); if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD) { puts("sd"); +#ifdef __SW_BOOT_SD2 + } else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD2) { + puts("sd"); +#endif #ifdef __SW_BOOT_SPI } else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SPI) { puts("spi"); diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 81dc0177c0..cc703309e3 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -57,7 +57,8 @@ #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 #define __SW_BOOT_SPI 0x28 -#define __SW_BOOT_SD 0x68 /* or 0x18 */ +#define __SW_BOOT_SD 0x68 +#define __SW_BOOT_SD2 0x18 #define __SW_BOOT_NAND 0xe8 #define __SW_BOOT_PCIE 0xa8 #define CONFIG_SYS_L2_SIZE (512 << 10) -- 2.39.5