From 309a9165f8564dc4608ed9dacfe4577413225cd7 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> Date: Thu, 9 Jan 2014 01:48:19 +0530 Subject: [PATCH] zynq: Add zynq_zc770 xm013 board support ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> --- boards.cfg | 1 + include/configs/zynq_zc770.h | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/boards.cfg b/boards.cfg index 02e144faa5..19905d0bb1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -361,6 +361,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x - Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren@nvidia.com> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel <alban.bedel@avionic-design.de> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel <alban.bedel@avionic-design.de> diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 8589d9d5e8..181f9fb832 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,11 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM013) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 + #else # define CONFIG_ZYNQ_SERIAL_UART0 #endif -- 2.39.5