Marek Vasut [Sun, 17 Sep 2023 14:08:35 +0000 (16:08 +0200)]
pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
Currently, the Renesas pin control driver supports pins that can switch
their I/O voltage levels between either 1.8V and 3.3V, or between 2.5V
and 3.3V. However, some SoCs have pins that can switch between 1.8V and
2.5V.
Add support for this by replacing the separate SH_PFC_PIN_CFG_IO_VOLTAGE
capability and voltage level flags by a 2-bit field, to cover three
possible I/O voltage switching options.
Ported from Linux kernel commit by Geert Uytterhoeven: b88e733ac517 ("pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 11:49:30 +0000 (13:49 +0200)]
ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on Salvator-X boards
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software
to identify the PHY model at any time, regardless of the state of
the PHY reset line.
This is a fix for missed addition of these properties on Salvator-X
boards.
Simon Glass [Thu, 7 Sep 2023 16:00:19 +0000 (10:00 -0600)]
buildman: Start the clock when the build starts
The Kconfig and maintainer processing can take a while, sometimes 5
seconds or more. This skews the timing printed by buildmand when the build
completes. Start the clock when the threads start to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Tom Rini <trini@konsulko.com>
AKASHI Takahiro [Wed, 23 Aug 2023 01:49:47 +0000 (10:49 +0900)]
cmd: dm: allow for selecting uclass and device
The output from "dm tree" or "dm uclass" is a bit annoying
if the number of devices available on the system is huge.
(This is especially true on sandbox when I debug some DM code.)
With this patch, we can specify the uclass name or the device
name that we are interested in in order to limit the output.
For instance,
=> dm uclass usb
uclass 121: usb
0 usb@1 @ 0bcff8b0, seq 1
Jonas Karlman [Sun, 20 Aug 2023 22:03:18 +0000 (22:03 +0000)]
dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation
Nodes with bootph-pre-sram/ram props are bound in multiple phases:
1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase
2. At U-Boot proper pre-relocation phase
3. At U-Boot proper normal phase
However the binding and U-Boot Driver Model documentation indicate that
only nodes marked with bootph-all or bootph-some-ram should be bound in
the U-Boot proper pre-relocation phase.
Change ofnode_pre_reloc to report a node with bootph-pre-ram/sram prop
with a pre-reloc status only after U-Boot proper pre-relocation phase.
Also update the ofnode_pre_reloc documentation to closer reflect the
binding and driver model documentation.
This changes behavior of what nodes are bound in the U-Boot proper
pre-relocation phase. Change to bootph-all or add bootph-some-ram prop
to restore prior behavior.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 22 Sep 2023 15:16:22 +0000 (11:16 -0400)]
Merge tag 'x86-pull-20230922' of https://source.denx.de/u-boot/custodians/u-boot-x86 into next
- Add bootstd support to 64-bit efi payload
- Fix a bug of missing setting size of initrd in pxeboot
- Allow Python packages to be dropped
- Reland "x86: Move FACP table into separate functions"
- Fixes for chromebook_link64 and chromebook_samus_tpl
- Fixes and improvements for coreboot
- x86 documentation updates
Simon Glass [Wed, 20 Sep 2023 13:29:51 +0000 (07:29 -0600)]
efi: Use the installed SMBIOS tables
U-Boot should set up the SMBIOS tables during startup, as it does on x86.
Ensure that it does this correctly on non-x86 machines too, by creating
an event spy for last-stage init.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 13:29:49 +0000 (07:29 -0600)]
bootstd: Keep track of use of usb stop
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.
Simon Glass [Wed, 20 Sep 2023 03:00:13 +0000 (21:00 -0600)]
x86: smbios: Add a Kconfig indicating SMBIOS-table presence
When booted from coreboot, U-Boot does not build the SMBIOS tables, but
it should still pass them on to the OS. Add a new option which indicates
whether SMBIOS tables are present, however they were built.
Flip the ordering so that the dependency is listed first, which is less
confusing.
Adjust GENERATE_SMBIOS_TABLE to depend on this new symbol.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:11 +0000 (21:00 -0600)]
x86: coreboot: Enable VIDEO_COPY
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.
Enable the VIDEO_COPY feature to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:08 +0000 (21:00 -0600)]
x86: coreboot: Enable CONFIG_SYS_NS16550_MEM32
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.
Enable 32-bit access to avoid this trap.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:07 +0000 (21:00 -0600)]
x86: coreboot: Look for DBG2 UART in SPL too
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:05 +0000 (21:00 -0600)]
x86: Set the CPU vendor in SPL
We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 Sep 2023 19:13:02 +0000 (13:13 -0600)]
x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.
Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.
To enable it (in addition to serial and video), use:
setenv stdout serial,vidconsole,cbmem
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:20 +0000 (09:58 -0600)]
x86: dm: Mark driver model as dead when disabling CAR
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:13 +0000 (09:58 -0600)]
dm: core: Allow marking driver model as dead
On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
SPL, since SDRAM is not set up yet. This means that driver model stores
its tables in this region.
When preparing to jump from SPL to U-Boot proper, we must disable CAR, so
that the CPU can uses the caches normally. This means that driver model
tables become inaccessible. From there until we jump to U-Boot proper, we
must avoid using driver model.
This is only a problem on boards which operate this way, for example
chromebook_link64
Add a flag to indicate that driver model is dead and should not be used.
It can be used in SPL to avoid hanging the machine.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Fri, 1 Sep 2023 17:27:10 +0000 (11:27 -0600)]
x86: Prevent from missing the FADT chaining
Recent approach with FADT writer shows that there is
a room for subtle errors. Prevent this from happening
again by introducing acpi_add_fadt() helper.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 1 Sep 2023 17:27:09 +0000 (11:27 -0600)]
Reland "x86: Move FACP table into separate functions""
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.
Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Simon Glass [Thu, 31 Aug 2023 17:20:53 +0000 (11:20 -0600)]
x86: coreboot: Avoid a declaration after a label
Declare the global_data pointer at the top of the file, to avoid an
error:
arch/x86/include/asm/global_data.h:143:35: error: a label can
only be part of a statement and a declaration is not a statement
board/coreboot/coreboot/coreboot.c:60:2: note: in expansion of macro
‘DECLARE_GLOBAL_DATA_PTR’
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 31 Aug 2023 17:20:52 +0000 (11:20 -0600)]
Allow Python packages to be dropped
When building in a portage chroot, we do not have the environment needed
to build pylibfdt. It is instead build as a separate package.
Provide a build option to tell U-Boot to skip this part of the build. We
still need it to use binman, etc. but don't need it to build its
dependencies.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org>
[s/build bytes/builds bytes in tools.rst] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Enable bootstd support for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/bootstd.rst
This is used to boot system images at Virtualbox via
- distroboot (extlinux.conf)
- boot script
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@bosch.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the needed boot data.
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag and rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 21 Sep 2023 14:51:58 +0000 (10:51 -0400)]
Merge tag 'xilinx-for-v2024.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2024.01-rc1
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
spi: zynqmp_qspi: Workaround for small data cache issue
Cache related issues are seen with small sized data reads.
Due to this, proper data is not read. Also some times sf probe
fails randomly. To workaround this issue, invalidate dcache after read DMA
is triggered.
spi: zynqmp_qspi: Change flush cache to invalidate cache
Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.
Michal Simek [Fri, 15 Sep 2023 12:12:05 +0000 (14:12 +0200)]
trace: Fix alignment logic in flyrecord header
Current alignment which is using 16 bytes is not correct in connection to
trace_clocks description and it's length.
That's why use start_addr variable and record proper size based on used
entries.
projects / u-boot.git / log
