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3 years agoboard: dts: rockchip: Add NanoPi M4B
Alexandre Vicenzi [Fri, 26 Mar 2021 12:37:10 +0000 (13:37 +0100)]
board: dts: rockchip: Add NanoPi M4B

Add initial support for NanoPi M4B, a minor revision of
the original NanoPi M4.

Commit details of rk3399-nanopi-m4b.dts sync from Linux 5.12-rc4:
"arm64: dts: rockchip: Add NanoPi M4B board"
(sha1: c7b03115003f7f337ab165542cee37148cf30a8a)

Signed-off-by: Alexandre Vicenzi <alexandre.vicenzi@suse.com>
Reviewed-by: Kever Yang <kever.yang@rock-cihps.com>
3 years agoarm64: rk3399: Add support NanoPi R4s
Xiaobo Tian [Sat, 27 Feb 2021 14:39:11 +0000 (22:39 +0800)]
arm64: rk3399: Add support NanoPi R4s

NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support,
including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port.
port.It also has two GPIO headers which allows further peripherals to be used.

The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].

[1] https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6

Signed-off-by: xiaobo <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoodroid-go2: fix default FDT file path
Roger Pau Monné [Mon, 22 Feb 2021 09:25:59 +0000 (10:25 +0100)]
odroid-go2: fix default FDT file path

The path in the Linux kernel dts directory is
rockchip/rk3326-odroid-go2.dtb.

That also seems to match the FDT path set on other boards (ie:
rock64-rk3328 for example).

Signed-off-by: Roger Pau Monne <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoodroid-go2: do not disable EFI
Roger Pau Monné [Mon, 22 Feb 2021 09:25:58 +0000 (10:25 +0100)]
odroid-go2: do not disable EFI

Remove the unset of the EFI loader, it's possible for U-Boot to
provide a EFI environment on this board, and it's also required by
the FreeBSD loader which mandated EFI on Aarch64.

Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3399-puma: Increase environment size to 16 kiB.
Christoph Muellner [Fri, 19 Feb 2021 00:30:02 +0000 (01:30 +0100)]
rockchip: rk3399-puma: Increase environment size to 16 kiB.

On Puma we have the environment at an offset of 16 kiB.
On the eMMC this gives us 16 kiB for the environment before the SPL starts.
On the SPI NOR we also have 16 kiB until end of flash.
So let's increase the environment size from 8 kiB to its maximum
of 16 kiB for both MMC and SPI NOR.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3399-puma: Restore correct VDD_LOG supply.
Christoph Muellner [Fri, 19 Feb 2021 00:29:48 +0000 (01:29 +0100)]
rockchip: rk3399-puma: Restore correct VDD_LOG supply.

A commit from last year re-imported the DTS files form the upstream kernel.
By doing so the VDD_LOG regulator in the board's DTS was dropped.
Let's restore this, but move it into the u-boot overlay to prevent this
issue in the future.

Fixes: 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3399: rock960: explicitly disable SPI flash
Peter Robinson [Sun, 14 Feb 2021 19:43:28 +0000 (19:43 +0000)]
rockchip: rk3399: rock960: explicitly disable SPI flash

The Rock960 doesn't have SPI flash on-board, but the bits
get enabled by default which means when booting we get
some errors. Explicitly disable it to stop the errors.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoinclude: configs: rk3399: drop a dangling comment
Peter Robinson [Sun, 14 Feb 2021 19:40:15 +0000 (19:40 +0000)]
include: configs: rk3399: drop a dangling comment

Drop a irrelevent comment now the related configs have moved
to the various config files.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: lion: update board defconfig
Heiko Stuebner [Tue, 9 Feb 2021 13:47:10 +0000 (14:47 +0100)]
rockchip: lion: update board defconfig

Adds the needed target option and drivers needed for correct
bringup.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: sync down rk3368-lion board devicetree from Linux
Heiko Stuebner [Tue, 9 Feb 2021 13:47:09 +0000 (14:47 +0100)]
rockchip: rk3368: sync down rk3368-lion board devicetree from Linux

This brings the actual rk3368-lion devicetree files from Linux 5.10
instead of using something separate.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: sync main rk3368 dtsi from Linux
Heiko Stuebner [Tue, 9 Feb 2021 13:47:08 +0000 (14:47 +0100)]
rockchip: rk3368: sync main rk3368 dtsi from Linux

This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.

With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: sync clock dt-binding header from Linux
Heiko Stuebner [Tue, 9 Feb 2021 13:47:07 +0000 (14:47 +0100)]
rockchip: rk3368: sync clock dt-binding header from Linux

This is the state as of v5.10 in Linux.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: move STACK_R_ADDR address and into Kconfig
Heiko Stuebner [Tue, 9 Feb 2021 13:47:06 +0000 (14:47 +0100)]
rockchip: rk3368: move STACK_R_ADDR address and into Kconfig

With the STACK_R_ADDR at 0x600000 (6MB) we're competing with
with the loading address of either u-boot or atf parts, so move
that away to 0x4000000 (64MB) similar to rk3399.

Only lion currently sets that at all but not sheep the second
rk3368 board, so just move that to the Kconfig for rk3368 similar
to rk3399 as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000
Heiko Stuebner [Tue, 9 Feb 2021 13:47:05 +0000 (14:47 +0100)]
rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000

To prevent running out of memory, increase SYS_MALLOC_F_LEN to 0x4000
similar to what rk3399 uses.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB
Heiko Stuebner [Tue, 9 Feb 2021 13:47:04 +0000 (14:47 +0100)]
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB

Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so
that regular kernel images can get loaded without problems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR
Heiko Stuebner [Tue, 9 Feb 2021 13:47:03 +0000 (14:47 +0100)]
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR

CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB
behind the area where we load u-boot to, which depending on u-boot size
may overlap at some point.

So for safety just pick the same value rk3399 has and set
CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoodroid-go2: remove setting SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Roger Pau Monné [Sat, 13 Feb 2021 15:59:01 +0000 (16:59 +0100)]
odroid-go2: remove setting SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR

Using a non-default SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR setting makes the
resulting u-boot-rockchip.bin unbootable, as it gets stuck after SPL.
Removing the setting from the defconfig allows U-Boot to load
successfully.

Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoMerge tag 'dm-pull-28mar21' of git://git.denx.de/u-boot-dm into next
Tom Rini [Mon, 29 Mar 2021 00:29:39 +0000 (20:29 -0400)]
Merge tag 'dm-pull-28mar21' of git://git.denx.de/u-boot-dm into next

binman support for expanding entries, connections
misc fixes and improvements to sandbox, etc.
x86 CBFS improvements
x86 coreboot improvements

3 years agosandbox: define __dyn_sym_start, dyn_sym_end
Heinrich Schuchardt [Tue, 23 Mar 2021 11:37:47 +0000 (12:37 +0100)]
sandbox: define __dyn_sym_start, dyn_sym_end

On RISC-V the symbols __dyn_sym_start, dyn_sym_end are referenced in
efi_runtime_relocate().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agospi: spi-uclass: Add support to manually relocate spi memory ops
T Karthik Reddy [Wed, 17 Mar 2021 11:31:30 +0000 (12:31 +0100)]
spi: spi-uclass: Add support to manually relocate spi memory ops

Add spi memory operations to relocate manually when
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
3 years agodtoc: Add new check that offsets are correct
Simon Glass [Sun, 21 Mar 2021 05:24:39 +0000 (18:24 +1300)]
dtoc: Add new check that offsets are correct

Add a few more internal checks to make sure offsets are correct, before
updating the dtb.

To make this easier, update the functions which add a property to return
that property,.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Support adding subnodes alongside existing ones
Simon Glass [Sun, 21 Mar 2021 05:24:38 +0000 (18:24 +1300)]
dtoc: Support adding subnodes alongside existing ones

So far we have only needed to add subnodes to empty notds, so have not
had to deal with ordering. However this feature is needed for binman's
expanded nodes, since there may be another node in the same section.

While libfdt adds new properties after existing properties, it adds new
subnodes before existing subnodes. This means that we must reorder the
nodes in the cached version, so that the ordering remains consistent.

Update the sync implementation to sync existing subnodes first, then
add new ones, then tidy up the ordering in the cached version. Update the
test to cover this behaviour.

Also improve the comment about property syncing while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Add a subnode test for multiple nodes
Simon Glass [Sun, 21 Mar 2021 05:24:37 +0000 (18:24 +1300)]
dtoc: Add a subnode test for multiple nodes

Add a new test that adds a subnode alongside an existing one, as well as
adding properties to a subnode. This will expand to adding multiple
subnodes in future patches. Put a node after the one we are adding to so
we can check that things sync correctly.

The testAddNode() test should be in the TestNode class since it is a node
test, so move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Tweak ordering of fdt-offsets refreshing
Simon Glass [Sun, 21 Mar 2021 05:24:36 +0000 (18:24 +1300)]
dtoc: Tweak ordering of fdt-offsets refreshing

Once the tree has been synced, thus potentially moving things around in the
fdt, we set _cached_offsets to False so that a refresh will happen next
time a property is accessed.

This 'lazy' refresh doesn't really save much time, since refresh is a very
fast operation, just a single walk of the tree. Also, having the refresh
happen in the bowels of property access it makes it harder to figure out
what is going on.

Simplify the code by always doing a refresh before and after a sync. Set
_cached_offsets to True immediately after this, in the Refresh() function,
since this makes more sense than doing it in the caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Tidy up property-offset handling
Simon Glass [Sun, 21 Mar 2021 05:24:35 +0000 (18:24 +1300)]
dtoc: Tidy up property-offset handling

If a property does not yet have an offset, then that means it exists in
the cache'd fdt but has not yet been synced back to the flat tree. Use
the dirty flag for this so we don't need to check the offset too. Improve
the comments for Prop and Node to make it clear what an offset of None
means.

Also clear the dirty flag after the property is synced.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Improve internal error for Refresh()
Simon Glass [Sun, 21 Mar 2021 05:24:34 +0000 (18:24 +1300)]
dtoc: Improve internal error for Refresh()

Add the node name too so it is easy to see which node failed.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Support default alignment for sections
Simon Glass [Sun, 21 Mar 2021 05:24:33 +0000 (18:24 +1300)]
binman: Support default alignment for sections

Sometimes it is useful to specify the default alignment for all entries
in a section, such as when word-alignment is necessary, for example. It
is tedious and error-prone to specify this individually for each section.

Add a property to control this for a section.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Support obtaining section contents immediately
Simon Glass [Sun, 21 Mar 2021 05:24:32 +0000 (18:24 +1300)]
binman: Support obtaining section contents immediately

Generally the content of sections is not built until the final assembly
of the image. This is partly to avoid wasting time, since the entries
within sections may change multiple times as binman works through its
various stages. This works quite well since sections exist in a strict
hierarchy, so they can be processed in a depth-first manner.

However the 'collection' entry type does not have this luxury. If it
contains a section within its 'content' list, then it must produce the
section contents, if available. That section is typically a sibling
node, i.e. not part oc the collection's hierarchy.

Add a new 'required' argument to section.GetData() to support this. When
required is True, any referenced sections are immediately built. If this
is not possible (because one of the subentries does not have its data yet)
then an error is produced.

The test for this uses a 'collection' entry type, referencing a section as
its first member. This forces a call to _BuildSectionData() with required
set to False, at first, then True later, when the image is assembled.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Add support for a collection of entries
Simon Glass [Sun, 21 Mar 2021 05:24:31 +0000 (18:24 +1300)]
binman: Add support for a collection of entries

The vblock entry type includes code to collect the data from a number of
other entries (not necessarily subentries) and concatenating it. This is
a useful feature for other entry types.

Make it a base class, so that vblock can use it, along with other entry
types.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Allow disabling expanding an entry
Simon Glass [Sun, 21 Mar 2021 05:24:30 +0000 (18:24 +1300)]
binman: Allow disabling expanding an entry

At present there is a command-line flag to disable substitution of expanded
entries. Add an option to the entry node as well, so it can be controlled
at the node level.

Add a test to cover this. Fix up the comment to the checkSymbols() function
it uses, while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Use a unique number for the symbols test file
Simon Glass [Sun, 21 Mar 2021 05:24:29 +0000 (18:24 +1300)]
binman: Use a unique number for the symbols test file

Two test devicetree files currently have 192 as their unique number. Fix
this by separating them out.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Show memory config and SKU ID on startup
Simon Glass [Sun, 21 Mar 2021 03:50:07 +0000 (16:50 +1300)]
x86: coral: Show memory config and SKU ID on startup

Provide the model information through sysinfo so that it shows up on
boot. For memconfig 4 pins are provided, for 16 combinations. For SKU
ID there are two options:

   - two pins provided in a ternary arrangement, for 9 combinations.
   - reading from the EC

Add a binding doc and drop the unused #defines as well.

Example:

   U-Boot 2021.01-rc5

   CPU:   Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
   DRAM:  3.9 GiB
   MMC:   sdmmc@1b,0: 1, emmc@1c,0: 2
   Video: 1024x768x32 @ b0000000
   Model: Google Coral (memconfig 5, SKU 3)

This depends on the GPIO series:

   http://patchwork.ozlabs.org/project/uboot/list/?series=228126

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosysinfo: Allow showing model info from sysinfo
Simon Glass [Sun, 21 Mar 2021 03:50:06 +0000 (16:50 +1300)]
sysinfo: Allow showing model info from sysinfo

Some boards may want to show the SKU ID or other information obtained at
runtime. Allow this to come from sysinfo. The board can then provide a
sysinfo driver to provide it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosandbox: Correct uninit conflict
Simon Glass [Mon, 15 Mar 2021 05:11:24 +0000 (18:11 +1300)]
sandbox: Correct uninit conflict

It is not possible to remove the state before driver model is uninited,
since the devices are allocated in the memory buffer. Also it is not
possible to uninit driver model afterwards, since the RAM has been
freed.

Drop the uninit altogether, since it is not actually necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobootm: Skip command-line substitution if !CONFIG_CMDLINE
Simon Glass [Mon, 15 Mar 2021 05:11:23 +0000 (18:11 +1300)]
bootm: Skip command-line substitution if !CONFIG_CMDLINE

When there is no command line, we cannot enable this feature. Add a check
to avoid a build error.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobloblist: Make BLOBLIST_TABLES depend on BLOBLIST
Simon Glass [Mon, 15 Mar 2021 05:11:22 +0000 (18:11 +1300)]
bloblist: Make BLOBLIST_TABLES depend on BLOBLIST

Add an extra condition here since we cannot put x86 tables in a bloblist
when bloblists are not supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocommand: Fix operation of !CONFIG_CMDLINE
Simon Glass [Mon, 15 Mar 2021 05:11:21 +0000 (18:11 +1300)]
command: Fix operation of !CONFIG_CMDLINE

The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE
is not enabled. Fix this by updating the macro to provide the 'repeatable'
arugment in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodoc: Convert Chromium OS docs to rst
Simon Glass [Mon, 15 Mar 2021 05:11:20 +0000 (18:11 +1300)]
doc: Convert Chromium OS docs to rst

Move this documentation over to reST. Move the example files into a files/
directory so they are still separate.

Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agomalloc: Export malloc_simple_info()
Simon Glass [Mon, 15 Mar 2021 05:11:19 +0000 (18:11 +1300)]
malloc: Export malloc_simple_info()

Export this function always so it can be used behind IS_ENABLED() instead
of requiring an #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocpu: Rename SPL_CPU_SUPPORT to SPL_CPU
Simon Glass [Mon, 15 Mar 2021 05:11:18 +0000 (18:11 +1300)]
cpu: Rename SPL_CPU_SUPPORT to SPL_CPU

The _SUPPORT suffix is from an earlier time and interferes with use of
the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.

Tidy up the TODO that prompted this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosf: Support querying write-protect
Simon Glass [Mon, 15 Mar 2021 05:11:17 +0000 (18:11 +1300)]
sf: Support querying write-protect

This feature was dropped from U-Boot some time ago:

   f12f96cfaf5 (sf: Drop spl_flash_get_sw_write_prot")

However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).

I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.

Re the points mentioned in the removal commit:

    1) This kind of requirement can be achieved using existing
       flash operations and flash locking API calls instead of
       making a separate flash API.

Which uclass is this?

    2) Technically there is no real hardware user for this API to
       use in the source tree.

I do want coral (at least) to support this.

    3) Having a flash operations API for simple register read bits
       also make difficult to extend the flash operations.

This new patch only mentions write-protect being on or off, rather than
the actual mechanism.

    4) Instead of touching generic code, it is possible to have
       this functionality inside spinor operations in the form of
       flash hooks or fixups for associated flash chips.

That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobootstage: Warning if space is exhausted
Simon Glass [Mon, 15 Mar 2021 05:11:16 +0000 (18:11 +1300)]
bootstage: Warning if space is exhausted

At present bootstage silently ignores new records if it runs out of
space. It is sometimes obvious by looking at the report, but the IDs are
not contiguous, so it is easy to miss.

Aad a message so that action can be taken.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agospl: Split out bootstage ID into a function
Simon Glass [Mon, 15 Mar 2021 05:11:15 +0000 (18:11 +1300)]
spl: Split out bootstage ID into a function

We have two separate places that need to figure out the bootstage ID to
use. Put this code in a function so that the logic is in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Show a message when changing subnodes
Simon Glass [Mon, 15 Mar 2021 05:11:14 +0000 (18:11 +1300)]
binman: Show a message when changing subnodes

This change seems important enough to warrant a visible message. Change
the log_debug() to log_info().

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agotest: Silenece the echo and print tests
Simon Glass [Mon, 15 Mar 2021 05:11:13 +0000 (18:11 +1300)]
test: Silenece the echo and print tests

These tests current produce unwanted output on sandbox. Use the correct
functions to controller console output, to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: image: Allow sandbox to load any image
Simon Glass [Mon, 15 Mar 2021 05:11:12 +0000 (18:11 +1300)]
sandbox: image: Allow sandbox to load any image

Sandbox is special in that it is used for testing and it does not match
any particular target architecture. Allow it to load an image from any
architecture, so that 'bootm' can be used as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Provide a way to bind fixed/removeable devices
Simon Glass [Mon, 15 Mar 2021 05:11:11 +0000 (18:11 +1300)]
sandbox: Provide a way to bind fixed/removeable devices

At present when a file is bound to a host device it is always marked as
removeable. Arguably the device is removeable, since it can be unbound at
will. However while it is bound, it is not considered removable by the
user. Also it is useful to be able to model both fixed and removeable
devices for code that distinguishes them.

Add a -r flag to the 'host bind' command and plumb it through to provide
this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Update do_host_bind() argument counting
Simon Glass [Mon, 15 Mar 2021 05:11:10 +0000 (18:11 +1300)]
sandbox: Update do_host_bind() argument counting

Remove the 'bind' subcommand before processing the arguments. This will
make it easier to add an optional flag.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Disintangle declarations in do_host_bind()
Simon Glass [Mon, 15 Mar 2021 05:11:09 +0000 (18:11 +1300)]
sandbox: Disintangle declarations in do_host_bind()

This function has a strange mix of declarations and argument parsing
which is a bit hard to follow and harder to modify. Separate out the
declarations at the start of the function and adjust the ordering of
the code slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: cros_ec: Only write EC state when the EC is probed
Simon Glass [Mon, 15 Mar 2021 05:11:08 +0000 (18:11 +1300)]
sandbox: cros_ec: Only write EC state when the EC is probed

This can crash if the EC has not yet been probed. Add a check to prevent
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Only delete the executable if requested
Simon Glass [Mon, 15 Mar 2021 05:11:07 +0000 (18:11 +1300)]
sandbox: Only delete the executable if requested

At present sandbox removes its executable after failing to run it,
since there is no other way that it would get cleaned up.

However, this is actually only wanted if the image was created within
sandbox. For the case where the image was generated by the build system,
such as u-boot-spl, we don't want to delete it.

Handle the two code paths accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosandbox: Only call timer_timebase_fallback() if present
Simon Glass [Mon, 15 Mar 2021 05:11:06 +0000 (18:11 +1300)]
sandbox: Only call timer_timebase_fallback() if present

This function only exists if CPU is enabled. Update the code to take
account of this, so that it does not have to be enabled on all sandbox
builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
3 years agox86: coreboot: Don't setup MTRR when booting from coreboot
Simon Glass [Mon, 15 Mar 2021 05:00:34 +0000 (18:00 +1300)]
x86: coreboot: Don't setup MTRR when booting from coreboot

This currently hangs and it is not necessary in any case. Drop the code
when booting from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: fsp: Don't notify if booted from coreboot
Simon Glass [Mon, 15 Mar 2021 05:00:33 +0000 (18:00 +1300)]
x86: fsp: Don't notify if booted from coreboot

When booting from coreboot there is no need to notify the FSP of anything,
since coreboot has already done it. Nor it is possible, since the FSP
details are not provided by coreboot.

Skip it in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Fall back to coreboot video when FSP missing
Simon Glass [Mon, 15 Mar 2021 05:00:32 +0000 (18:00 +1300)]
x86: coral: Fall back to coreboot video when FSP missing

When booting from coreboot the FSP video information is no-longer
available. Enable the coreboot driver so that we can get some sort of
display in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Allow init of debug UART in U-Boot proper
Simon Glass [Mon, 15 Mar 2021 05:00:31 +0000 (18:00 +1300)]
x86: coral: Allow init of debug UART in U-Boot proper

At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.

Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Avoid build error with !CONFIG_ACPIGEN
Simon Glass [Mon, 15 Mar 2021 05:00:30 +0000 (18:00 +1300)]
x86: coral: Avoid build error with !CONFIG_ACPIGEN

When CONFIG_ACPIGEN is not enabled the CPU code does not build. Fix this
by moving things around.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodm: core: Add CBFS support to flashmap
Simon Glass [Mon, 15 Mar 2021 05:00:29 +0000 (18:00 +1300)]
dm: core: Add CBFS support to flashmap

Allow referencing a CBFS file in the flashmap, so that it is possible to
boot from coreboot, where files are not available from binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: fsp: Don't enable FSP graphics if booted from coreboot
Simon Glass [Mon, 15 Mar 2021 05:00:28 +0000 (18:00 +1300)]
x86: fsp: Don't enable FSP graphics if booted from coreboot

This driver cannot work when booted from coreboot, since the FSP
information is not available. Disable it in that case, so that the
coreboot video driver can be used instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: video: Allow coreboot video to be used on any x86 board
Simon Glass [Mon, 15 Mar 2021 05:00:27 +0000 (18:00 +1300)]
x86: video: Allow coreboot video to be used on any x86 board

When booting from coreboot we need this driver for the video to work.
Update the driver to be usable on any board.

The driver disables itself if it sees that is not booted from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agovideo: Fix video on coreboot with the copy buffer
Simon Glass [Mon, 15 Mar 2021 05:00:26 +0000 (18:00 +1300)]
video: Fix video on coreboot with the copy buffer

The copy buffer, if enabled, prevents booting from coreboot correctly,
since no memory is allocated for it. Allow it to fall back to disabled
in this situation. This ensures that a console is displayed, even if
it is slow.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocmd: Add missing check for CONFIG_SYS_LONGHELP
Simon Glass [Mon, 15 Mar 2021 05:00:25 +0000 (18:00 +1300)]
cmd: Add missing check for CONFIG_SYS_LONGHELP

Two commands are missing this check, so compilation fails when building
without CONFIG_CMDLINE. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Add a command to display coreboot sysinfo
Simon Glass [Mon, 15 Mar 2021 05:00:24 +0000 (18:00 +1300)]
x86: Add a command to display coreboot sysinfo

This information is interesting to look at and can be important for
debugging and inspection. Add a command to display it in a helpful
format.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Allow installing an e820 when booting from coreboot
Simon Glass [Mon, 15 Mar 2021 05:00:23 +0000 (18:00 +1300)]
x86: Allow installing an e820 when booting from coreboot

Move this code into a generic location so that it can be used by other x86
boards which want to boot from coreboot. Also ensure that this is called
if booting from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coreboot: Update parsing of the latest sysinfo
Simon Glass [Mon, 15 Mar 2021 05:00:22 +0000 (18:00 +1300)]
x86: coreboot: Update parsing of the latest sysinfo

Quite a few new tag types have been added over the years. Bring these into
U-Boot so that all required tags can be parsed.

Add a proper comment to struct sysinfo_t while we are here, since many of
the meanings are not obvious.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Move coreboot sysinfo parsing into generic x86 code
Simon Glass [Mon, 15 Mar 2021 05:00:21 +0000 (18:00 +1300)]
x86: Move coreboot sysinfo parsing into generic x86 code

It is useful to be able to parse coreboot tables on any x86 build which is
booted from coreboot. Add a new Kconfig option to enable this feature and
move the code so it can be used on any board, if enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coreboot: Sync up timestamp codes
Simon Glass [Mon, 15 Mar 2021 05:00:20 +0000 (18:00 +1300)]
x86: coreboot: Sync up timestamp codes

Add new timestamp codes that are present in coreboot, so that we can decode
these in U-Boot.

At present TS_U_BOOT_START_KERNEL is used twice. It should only be used
just before jumping to Linux, so update the other call site to use
TS_START_KERNEL.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Move coreboot timestamp info into coreboot_tables.h
Simon Glass [Mon, 15 Mar 2021 05:00:19 +0000 (18:00 +1300)]
x86: Move coreboot timestamp info into coreboot_tables.h

This all relates to the sysinfo structure provided by coreboot. Put the
timestamp definitions into the same file as the others. Tidy up a few
comments at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Make coreboot sysinfo available to any x86 board
Simon Glass [Mon, 15 Mar 2021 05:00:18 +0000 (18:00 +1300)]
x86: Make coreboot sysinfo available to any x86 board

It is possible to boot U-Boot for chromebook_coral either 'bare metal' or
from coreboot. In the latter case we want to provide access to the coreboot
sysinfo tables. Move the definitions into a file available to any x86
board.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Drop unnecessary cast in file_cbfs_fill_cache()
Simon Glass [Mon, 15 Mar 2021 05:00:17 +0000 (18:00 +1300)]
cbfs: Drop unnecessary cast in file_cbfs_fill_cache()

The results of malloc() are a void * and so this cast is unnecessary. Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Support reading compression information
Simon Glass [Mon, 15 Mar 2021 05:00:16 +0000 (18:00 +1300)]
cbfs: Support reading compression information

CBFS now supports compressed filed. Add support for reading this
information so that the correct decompression can be applied. The
decompression itself is not implemented in CBFS.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Simplify file iteration
Simon Glass [Mon, 15 Mar 2021 05:00:15 +0000 (18:00 +1300)]
cbfs: Simplify file iteration

In file_cbfs_next_file() there is a lot of complicated code to move to
the next file. Use the ALIGN() macros to simplify this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Factor out filling a cache node into a new function
Simon Glass [Mon, 15 Mar 2021 05:00:14 +0000 (18:00 +1300)]
cbfs: Factor out filling a cache node into a new function

The file_cbfs_next_file() function is already fairly long. Before
expanding it further, move the core part into a separate function.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Allow file traversal with any CBFS
Simon Glass [Mon, 15 Mar 2021 05:00:13 +0000 (18:00 +1300)]
cbfs: Allow file traversal with any CBFS

The file traversal functions currently use a single global CBFS. In some
cases we need to access multiple CBFSs to obtain different files. Add new
functions to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Allow access to CBFS without a header
Simon Glass [Mon, 15 Mar 2021 05:00:12 +0000 (18:00 +1300)]
cbfs: Allow access to CBFS without a header

In some cases CBFS does not start with a header but is just a collection
of files. It is possible to support this so long as the size of the CBFS
is provided.

Update the cbfs_init_mem() function to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agosmbios: Allow writing to the coreboot version string
Simon Glass [Mon, 15 Mar 2021 05:00:11 +0000 (18:00 +1300)]
smbios: Allow writing to the coreboot version string

When U-Boot is booted from coreboot the SMBIOS tables are written by
coreboot, not U-Boot. The existing method of updating the BIOS version
string does not work in that case, since gd->smbios_version is only set
when U-Boot writes the tables.

Add a new function which allows the version to be updated by parsing the
tables and writing the string in the correct place. Since coreboot
provides a pointer to the SMBIOS tables in its sysinfo structure, this
makes it easy to do the update.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Rename new_node to node
Simon Glass [Mon, 15 Mar 2021 05:00:10 +0000 (18:00 +1300)]
cbfs: Rename new_node to node

Rename this variable since there is no need to distinguish it from an old
node.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agocbfs: Add support for attributes
Simon Glass [Mon, 15 Mar 2021 05:00:09 +0000 (18:00 +1300)]
cbfs: Add support for attributes

CBFS now supports attributes for things that cannot fit in the header as
originally conceived. Add the structures for these.

Also rename attributes_offset to something shorter, to ease code
readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agommc: pci_mmc: Set up the card detect
Simon Glass [Mon, 15 Mar 2021 05:00:08 +0000 (18:00 +1300)]
mmc: pci_mmc: Set up the card detect

The driver currently reads the card-detect but does not register it with
the MMC stack. Update this so that card-detect works as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agotegra: i2c: Drop LOG_DEBUG
Simon Glass [Mon, 15 Mar 2021 05:00:07 +0000 (18:00 +1300)]
tegra: i2c: Drop LOG_DEBUG

We should not enable debugging by default. Drop this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Update the SD card-detect GPIO
Simon Glass [Mon, 15 Mar 2021 05:00:06 +0000 (18:00 +1300)]
x86: coral: Update the SD card-detect GPIO

Since the recent bug fix, it doesn't matter which GPIO phandle is used so
long as the GPIO number is right. Still, we may as well use the correct
one to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agox86: coral: Put the eMMC first
Simon Glass [Mon, 15 Mar 2021 05:00:05 +0000 (18:00 +1300)]
x86: coral: Put the eMMC first

At present the eMMC device does not have an alias so it appears after
the SD card which is device 1. There is no device 0 which is odd.

Make the eMMC device be the first one. Update the boot script to use the
new device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agox86: Probe device if needed in intel_gpio_xlate()
Simon Glass [Mon, 15 Mar 2021 05:00:04 +0000 (18:00 +1300)]
x86: Probe device if needed in intel_gpio_xlate()

The Intel GPIO binding allows GPIOs to be globally numbered, so that it
does not matter which GPIO bank is specified in the device tree. This is
convenient and avoid confusion since the banks do not have the same number
of GPIOs and the numbering is not sequential.

The GPIO uclass ensures that the device mentioned in the devicetree
binding is probed. It is fine for the driver to update gpio_desc to point
to a different driver, but this may not have been probed. If it has not
been, then it cannot be claimed since there is no uclass data.

We could handle this in the GPIO uclass but so far it is an unusual
situation so it is probably not worth the extra code. Handle this case in
the GPIO driver by probing the selected device if necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: p2sb: Drop LOG_DEBUG
Simon Glass [Mon, 15 Mar 2021 05:00:03 +0000 (18:00 +1300)]
x86: p2sb: Drop LOG_DEBUG

We should not enable debugging by default. Drop this.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Add information about building / running
Simon Glass [Mon, 15 Mar 2021 05:00:02 +0000 (18:00 +1300)]
x86: coral: Add information about building / running

Add detailed information on how to build the coral image, since it needs
binary blobs. Provide a way to avoid the memory-training delay.  Also show
the console output from a sample run.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: coral: Free the ACPI GPIOs after using them
Simon Glass [Mon, 15 Mar 2021 05:00:01 +0000 (18:00 +1300)]
x86: coral: Free the ACPI GPIOs after using them

These GPIOs are needed later if Chromium OS verified boot is running,
so free them after use.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agomtd: spi_flash_free()
Heinrich Schuchardt [Wed, 10 Mar 2021 17:23:57 +0000 (18:23 +0100)]
mtd: spi_flash_free()

dfu_free_entities() invoking dfu_free_entity_sf() has let to segementation
faults due to double freeing the same device.

spi_flash_free() is not relevant for the driver model but exists only for
compatibility with old drivers.

We must not remove any device here:

* The device may still be referenced.
* We don't want to have to probe again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agosandbox: dtsi: add rng
Vincent Stehlé [Wed, 10 Mar 2021 14:33:30 +0000 (15:33 +0100)]
sandbox: dtsi: add rng

Having an rng in the sandbox is useful not only for tests but also for e.g.
UEFI. Therefore, copy the rng node from test.dts to sandbox.dtsi.

In the case of UEFI, it can then be verified with `efidebug dh' that a
"Random Number Generator" protocol is indeed present.

This also fixes the following `bootefi' error:

  Missing RNG device for EFI_RNG_PROTOCOL

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
3 years agoMerge tag 'dm-pull-26mar21-take2' of git://git.denx.de/u-boot-dm into next
Tom Rini [Fri, 26 Mar 2021 16:15:26 +0000 (12:15 -0400)]
Merge tag 'dm-pull-26mar21-take2' of git://git.denx.de/u-boot-dm into next

dtoc support for of-platdata-inst
driver model support for of-platdata-inst
support of-platdata-inst on x86 / coral
binman support for exapanded entries
binman convert docs to reST
ti-sysc fix for duplicate uclass driver
patman minor improvements
pylibfdt build only if needed
correct obscure CI error with OF_PLATDATA_INST

3 years agobinman: Update various pieces of the documentation
Simon Glass [Thu, 18 Mar 2021 07:25:17 +0000 (20:25 +1300)]
binman: Update various pieces of the documentation

A few sections are a little out of date now. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Drop repetitive heading for each entry
Simon Glass [Thu, 18 Mar 2021 07:25:16 +0000 (20:25 +1300)]
binman: Drop repetitive heading for each entry

Many entries start 'Entry containing a'. This looks fine in the source
code but is annoying when viewed in the htmldocs table of contents. Drop
these unnecessary words.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Incorporate entry documentation
Simon Glass [Thu, 18 Mar 2021 07:25:15 +0000 (20:25 +1300)]
binman: Incorporate entry documentation

Update this to avoid sphinx warnings and incorporate it into the new
documentaiton tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Rearrange documentation into headings
Simon Glass [Thu, 18 Mar 2021 07:25:14 +0000 (20:25 +1300)]
binman: Rearrange documentation into headings

Collect the material into different top-level headings to make it easier
to read.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: doc: Add documentation to htmldocs
Simon Glass [Thu, 18 Mar 2021 07:25:13 +0000 (20:25 +1300)]
binman: doc: Add documentation to htmldocs

Add a link to binman's documentation and adjust the files so that it is
accessible. Use the name README.rst so it is easy to discover when binman
is installed without U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodoc: Move driver model docs under develop/
Simon Glass [Thu, 18 Mar 2021 07:25:12 +0000 (20:25 +1300)]
doc: Move driver model docs under develop/

These docs are useful for developers, not users. Move them under that
section.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agodoc: Move UEFI under develop/
Simon Glass [Thu, 18 Mar 2021 07:25:11 +0000 (20:25 +1300)]
doc: Move UEFI under develop/

Much of the content here is useful only for development. Move it under
that section.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agox86: dts: Drop unused CONFIG_SPL
Simon Glass [Thu, 18 Mar 2021 07:25:10 +0000 (20:25 +1300)]
x86: dts: Drop unused CONFIG_SPL

This cannot be used since the previous #elif has already dealt with SPL.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agox86: Make use of binman expanded entries
Simon Glass [Thu, 18 Mar 2021 07:25:09 +0000 (20:25 +1300)]
x86: Make use of binman expanded entries

We don't need to spell out the separate pieces of U-Boot phase binaries
anymore. Revert to using the simple entry and let binman do the expansion
itself as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agoMakefile: Pass new entry args to binman
Simon Glass [Thu, 18 Mar 2021 07:25:08 +0000 (20:25 +1300)]
Makefile: Pass new entry args to binman

To support the use of 'expanded' entries, binman needs to be told whether
SPL and TPL have a devicetree and whether they need BSS padding. Add these
to the Makefile.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Automatically expand phase binaries into sections
Simon Glass [Thu, 18 Mar 2021 07:25:07 +0000 (20:25 +1300)]
binman: Automatically expand phase binaries into sections

When creating an entry, check for an expanded version of that entry, then
use it instead. This allows, for example use of:

   u-boot {
   };

instead of having to write out in full:

   u-boot {
      type = "section";

      u-boot-nodtb {
      };

      u-boot-dtb {
      };
   };

Add an implementaion of this and associated documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>