Instead of copy pasting the commands needed to start a TPM consisting
of:
- tpm init
- tpm startup TPM2_SU_CLEAR
- tpm2 self_test full
use the newly added 'autostart' which does the same thing and simplify
our python scripts
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For a TPM device to be operational we need to initialize it and
perform its startup sequence. The 'tpm init' command currently calls
tpm_init() which ends up calling the ->open() per-device callback and
performs the initial hardware configuration as well as requesting
locality 0 for the caller. There no code that currently calls
tpm_init() without following up with a tpm_startup() and tpm_self_test_full()
or tpm_continue_self_test().
So let's add a 'tpm autostart' command and call tpm_auto_start() which
leaves the device in an operational state.
It's worth noting that calling tpm_init() only, doesn't allow a someone
to use the TPM since the startup sequence is mandatory. We always
repeat the pattern of calling
- tpm_init()
- tpm_startup()
- tpm_self_test_full() or tpm_continue_self_test()
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Detlev Casanova [Fri, 9 Jun 2023 15:19:08 +0000 (11:19 -0400)]
renesas: rcar: Apply ATF overlay for reserved-memory
The function fdtdec_board_setup() is called early and adds the overlay
from ATF to the u-boot device tree. That is necessary so that u-boot
doesn't use reserved memory.
Linux also needs to know about that reserved memory so the overlay from
ATF needs to be aplied on the linux device tree as well.
This commit makes sure that the ATF overlay is applied to both device trees.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Adam Ford <aford173@gmail.com>
ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.
While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Marek Vasut [Tue, 30 May 2023 22:51:26 +0000 (00:51 +0200)]
net: phy: Bind ETH_PHY uclass driver to each new PHY
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Cong Dang [Wed, 24 Aug 2022 23:06:54 +0000 (06:06 +0700)]
mtd: spi: renesas: Add 4 bytes address mode support
This patch adds 4-byte address mode support. Because traditional access
based on FIFO/shift register, it's complex to specify information like
opcode, address length, dummy bytes etc to flash. Replace the traditional
access by spi-mem layer which is essential to make 4-byte address mode
support possible.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 5 Aug 2021 07:38:26 +0000 (14:38 +0700)]
mtd: spi: renesas: Add R-Car Gen4 support
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
Hai Pham [Thu, 25 Aug 2022 03:32:56 +0000 (10:32 +0700)]
mtd: spi: renesas: Enable SPI_FLASH_SFDP_SUPPORT
Enable support for parsing and auto discovery of parameters for
SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
tables as per JESD216 standard.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Make SFDP the default unconditionally
Hai Pham [Mon, 16 Aug 2021 02:26:36 +0000 (09:26 +0700)]
mtd: spi: renesas: Extract strobe delay setting code into separate function
Move strobe delay setting code into extra function and reflect the latest
setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50).
i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products)
This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
Tom Rini [Sat, 10 Jun 2023 00:35:02 +0000 (20:35 -0400)]
Merge branch '2023-06-09-fwu-updates' into next
Two sets of FWU updates from Jassi Brar. First:
The patchset reduces ~400 lines of code, while keeping the functionality same and making
meta-data operations much faster (by using cached structures).
Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer instead of the common core in fwu.c (as also noted by
Ilias) that is, gpt_blk.c manages meta-data and similarly raw_mtd.c will have
to do the same when it arrives. The code could by make smaller, cleaner and
optimised.
Basic idea:
Introduce .read_mdata() and .write_mdata() in fwu_mdata_ops that simply
read/write meta-data copy. The core code takes care of integrity and redundancy
of the meta-data, as a result we can get rid of every other callback
.get_mdata() .update_mdata() .get_mdata_part_num() .read_mdata_partition()
.write_mdata_partition() and the corresponding wrapper functions thereby making
the code 100s of LOC smaller.
Get rid of fwu_check_mdata_validity() and fwu_mdata_check() which expected
underlying layer to manage and verify mdata copies.
Implement fwu_get_verified_mdata(struct fwu_mdata *mdata) public function that
reads, verifies and, if needed, fixes the meta-data copies.
Verified copy of meta-data is now cached as 'g_mdata' in fwu.c, which avoids
multiple low-level expensive read and parse calls.
gpt meta-data partition numbers are now cached in gpt_blk.c, so that we don't
have to do expensive part_get_info() and uid ops.
And second:
Introduce support for mtd backed storage for FWU feature and enable it on
Synquacer platform based DeveloperBox.
Jassi Brar [Wed, 31 May 2023 05:30:06 +0000 (00:30 -0500)]
fwu: provide default fwu_plat_get_bootidx
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.
Jassi Brar [Wed, 31 May 2023 05:29:56 +0000 (00:29 -0500)]
fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.
Masami Hiramatsu [Wed, 31 May 2023 05:29:14 +0000 (00:29 -0500)]
FWU: Add FWU metadata access driver for MTD storage regions
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
region. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a raw
MTD region.
The code is divided into core under drivers/fwu-mdata/ and some helper
functions clubbed together under lib/fwu_updates/
Jassi Brar [Mon, 6 Mar 2023 23:18:58 +0000 (17:18 -0600)]
test: dm: fwu: fix for the updated api
fwu_get_mdata() no more requires 'dev' argument and
fwu_check_mdata_validity() has been rendered useless and dropped.
Fix the test cases to work with aforementioned changes.
Jassi Brar [Mon, 6 Mar 2023 23:18:41 +0000 (17:18 -0600)]
fwu: meta-data: switch to management by common code
The common code can now read, verify and fix meta-data copies
while exposing one consistent structure to users.
Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num()
.read_mdata_partition() and .write_mdata_partition() and also the
corresponding wrapper functions.
Jassi Brar [Mon, 6 Mar 2023 23:18:28 +0000 (17:18 -0600)]
fwu: move meta-data management in core
Instead of each i/f having to implement their own meta-data verification
and storage, move the logic in common code. This simplifies the i/f code
much simpler and compact.
Jassi Brar [Mon, 6 Mar 2023 23:18:14 +0000 (17:18 -0600)]
dt/bindings: fwu-mdata-mtd: drop changes outside FWU
Any requirement of FWU should not require changes to bindings
of other subsystems. For example, for mtd-backed storage we
can do without requiring 'fixed-partitions' children to also
carry 'uuid', a property which is non-standard and not in the
bindings.
There exists no code yet, so we can change the fwu-mtd bindings
to contain all properties within the fwu-mdata node.
Import R8A77980 V3HSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
Import R8A77970 V3MSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
The reset_cpu() implementation is basically the same across Gen3
SoCs and identical across Gen4 SoCs. Introduce weak default for
reset_cpu(), so that it does not have to be duplicated in every
board file again.
There is a slight difference for CA53 only systems, like E3 and D3,
which now check MIDR for CPU ID first just like the other systems,
but this is OK since the MIDR always returns CA53 core type and the
correct reset register is written.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Tue, 4 May 2021 10:43:23 +0000 (17:43 +0700)]
ARM: rmobile: Identify R-Car D3 R8A77995 r1.1 SoC
Add support to identify R8A77995 r1.1 SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Marek: Slight update to commit message, spell out the SoC model]
r8a7796 cpu revision v1.2 has the same information as revision v1.1.
This patch fixes revision display at startup to "rev 1.1/1.2".
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Marek: Slight update to commit message, spell out the SoC model]
Sam Edwards [Thu, 8 Jun 2023 18:45:42 +0000 (12:45 -0600)]
usb: musb-new: sunxi: remove unused define
This is a remnant from when the USB controller driver managed
the reset signal itself. A patch from the very end of 2018 changed
this driver to delegate reset (and clock) management to the proper
control unit driver, but left this unused define behind.
Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:59 +0000 (14:41 +0900)]
test: efi_capsule: refactor efi_capsule test
Current efi capsule python tests have much code duplication.
This commit creates the common function
in test/py/tests/test_efi_capsule/capsule_common.py,
aim to reduce the code size and improve maintainability.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:56 +0000 (14:41 +0900)]
mkeficapsule: add FMP Payload Header
Current mkeficapsule tool does not provide firmware
version management. EDK II reference implementation inserts
the FMP Payload Header right before the payload.
It coutains the fw_version and lowest supported version.
This commit adds a new parameters required to generate
the FMP Payload Header for mkeficapsule tool.
'-v' indicates the firmware version.
When mkeficapsule tool is invoked without '-v' option,
FMP Payload Header is not inserted, the behavior is same as
current implementation.
The lowest supported version included in the FMP Payload Header
is not used, the value stored in the device tree is used instead.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:55 +0000 (14:41 +0900)]
efi_loader: check lowest supported version
The FMP Payload Header which EDK II capsule generation scripts
insert has a firmware version.
This commit reads the lowest supported version stored in the
device tree, then check if the firmware version in FMP payload header
of the ongoing capsule is equal or greater than the
lowest supported version. If the firmware version is lower than
lowest supported version, capsule update will not be performed.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:53 +0000 (14:41 +0900)]
efi_loader: versioning support in GetImageInfo
Current FMP->GetImageInfo() always return 0 for the firmware
version, user can not identify which firmware version is currently
running through the EFI interface.
This commit reads the "FmpStateXXXX" EFI variable, then fills the
firmware version in FMP->GetImageInfo().
Now FMP->GetImageInfo() and ESRT have the meaningful version number.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:52 +0000 (14:41 +0900)]
efi_loader: store firmware version into FmpState variable
Firmware version management is not implemented in the current
FMP protocol.
EDK II reference implementation capsule generation script inserts
the FMP Payload Header right before the payload, FMP Payload Header
contains the firmware version and lowest supported version.
This commit utilizes the FMP Payload Header, reads the header and
stores the firmware version into "FmpStateXXXX" EFI non-volatile variable.
XXXX indicates the image index, since FMP protocol handles multiple
image indexes.
Note that lowest supported version included in the FMP Payload Header
is not used. If the platform uses file-based EFI variable storage,
it can be tampered. The file-based EFI variable storage is not the
right place to store the lowest supported version for anti-rollback
protection.
This change is compatible with the existing FMP implementation.
This change does not mandate the FMP Payload Header.
If no FMP Payload Header is found in the capsule file, fw_version,
lowest supported version, last attempt version and last attempt
status is 0 and this is the same behavior as existing FMP
implementation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Masahisa Kojima [Wed, 7 Jun 2023 05:41:51 +0000 (14:41 +0900)]
efi_loader: add the number of image entries in efi_capsule_update_info
The number of image array entries global variable is required
to support EFI capsule update. This information is exposed as a
num_image_type_guids variable, but this information
should be included in the efi_capsule_update_info structure.
This commit adds the num_images member in the
efi_capsule_update_info structure. All board files supporting
EFI capsule update are updated.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A small late pull request for Allwinner. The main feature is just a DT
update, matching the v6.4 Linux kernel DT files. This also enables a
board (LCTech Pi F1C200s) which got its .dts file merged into Linux.
Plus a tiny typo fix from Sam.
Gitlab CI passed, briefly tested on an H616 board and the new LCTech Pi.
Andre Przywara [Tue, 11 Apr 2023 22:56:14 +0000 (23:56 +0100)]
sunxi: defconfig: Add Lctech Pi F1C200s board
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.
Add a defconfig for this board, enabling the most basic features. This
uses the new 64MB memory map, which avoids the very tight memory map we
use for the 32MB F1C100s board(s).
The devicetree file is already in the tree, courtesy of the previous
Linux repo sync.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Sun, 2 Apr 2023 00:17:07 +0000 (01:17 +0100)]
sunxi: dts: arm/arm64: update devicetree files from Linux-v6.4-rc2
Sync the devicetree files from the official Linux kernel tree, v6.4-rc2.
This is covering both 64-bit and 32-bit Allwinner SoCs with Arm Ltd.
cores, we skip the new RISC-V bits for now, as sunxi RISC-V support
is still work in progress.
Among smaller cosmetic changes, this adds a SATA regulator node which we
need in U-Boot to get rid of hard-coded GPIOs.
Also this updates the Allwinner F1C100s DTs, enabling USB support, and
also adds the DTs for two new boards.
As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
phy: rockchip-inno-usb2: Implement clock operations for usb2phy clock
This clock doesn't seem needed but appears in a phandle list used by
ehci-generic.c to bulk enable it. The phandle list comes from linux,
where it is needed for suspend/resume to work [1].
My tests give the same results with or without this patch, but Marek
Vasut found it weird to declare an empty clk_ops [2].
So I adapted the code from linux 6.1-rc8 so that it hopefully works
if it ever has some user. For now, without real use, it seems to
at least not give any errors when called.
Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Christoph Fritz <chf.fritz@googlemail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rk3399, rk3328, rv1126
Since clk_get_bulk() only looks for devices with UCLASS_CLK,
it fails with -ENODEV and then ehci_usb_probe() aborts.
The consequence is peripherals connected to a USB 2 port (e.g. in a
Rock Pi 4 the white port, nearer the edge) not being detected.
They're detected if CONFIG_USB_OHCI_GENERIC is selected in Kconfig,
because ohci_usb_probe() does not abort when one clk_get_by_index()
fails, but then they work in USB 1 mode.
rk3399.dtsi comes from linux and the u2phy0 was added[1] to the clock
list in:
arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
We found that the suspend process was blocked when it run into
ehci/ohci module due to clk-480m of usb2-phy was disabled.
[...]
Suspend concerns don't apply to U-Boot, and the problem with U-Boot
failing to probe EHCI doesn't apply to linux, because in linux
rockchip_usb2phy_clk480m_register makes u2phy0 a proper clock provider
when called by rockchip_usb2phy_probe().
So I can think of a few alternative solutions:
1- Change ehci_usb_probe() to make it more similar to
ohci_usb_probe(), and survive failure to get one clock. Looks a
little harder, and I don't know whether it could break something if
it ignored a clock that was important for something else than
suspend.
2- Change rk3399.dtsi effectively reverting the linux commit b5d1c57299734f5b54035ef2e61706b83041f20c. This dealigns the .dtsi
from linux and seems fragile at the next synchronisation.
3- Change the clock list in rk3399-u-boot.dtsi or somewhere else.
This survives .dts* sync but may survive "too much" and miss some
change from linux that we might want.
4- Enable CONFIG_USB_OHCI_GENERIC and use the ports in USB 1 mode.
This would need to be made for all boards using rk3399. In a
simple test reading one file from USB storage it gave 769.5 KiB/s
instead of 20.5 MiB/s with solution 2.
5- Trying to replicate linux and have usb2phy somehow provide a clk,
or have a separate clock device for usb2phy in addition to the phy
device.
This patch tries to implement option 5 as Marek Vasut requested in
December 5th. Options 1 and 3 didn't get through [2][3].
It just registers usb2phy as a clock driver (device_bind_driver()
didn't work but device_bind_driver_to_node() did), without any
specific operations, so that ehci-generic.c finds it and is happy. It
worked in my tests on a Rock Pi 4 B+ (rk3399).
Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Christoph Fritz <chf.fritz@googlemail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rk3399, rk3328, rv1126
According to the dm_serial_ops documentation, pending() should:
> @return number of waiting characters, 0 for none, -ve on error
And:
> It is acceptable to return 1 if an indeterminant number
> of characters is waiting.
With the current implementation, we have:
* FIFO is full -> pending() returns 0
* FIFO is partially used -> pending() returns 1
* FIFO is empty -> pending() returns 1
This is not the same as what the documentation requires.
Moreover, since [1], arm reset now flushes all console devices
(including serial) before the cpu gets reset.
Because of the flawed logic:
=> reset # user calls reset
flush() is called
_serial_flush() is called
ops->pending(dev, false) # never returns false
# board hangs indefinitely without resetting.
Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL.
[1] commit c5f4cdb8eb60 ("console: Use flush() before panic and reset"),
Ben Dooks [Tue, 6 Jun 2023 08:23:28 +0000 (09:23 +0100)]
ubifs: allow loading to above 4GiB
The ubifsload command is truncating any address above 4GiB as it casts
this address to an u32, instead of using an unsigned long which most of
the other load commands do. Change this to an unsigned long to allow
loading into high memory for boards which use these areas.
Andrea Merello [Fri, 26 May 2023 14:56:16 +0000 (16:56 +0200)]
I2C: cdns: Fix broken retry mechanism on arbitration lost.
In the current implementation, in case of I2C arbitration lost, a retry is
attempted; the message counter and pointer are reset to the original values
and the I2C xfer process is restart from the beginning.
However the message counter and message pointer are respectively
decremented and incremented by one before attempting any transfer, causing
the 1st transfer not to be actually retried (in case of a single transfer,
nothing is actually retried at all).
This patch fixes this: in case of retry, the 1st transfer is also retried.
Tested on a ZynqMP Kria board, with upstream older u-boot, but the involved
file and underlying logic seem basically the same.
Signed-off-by: Andrea Merello <andrea.merello@iit.it>
Ondrej Jirman [Thu, 25 May 2023 12:18:17 +0000 (14:18 +0200)]
i2c: rockchip: De-initialize the bus after start bit failure
Failure can happen when i2c is used without initializing pinctrl properly,
which U-Boot happily allows in SPL. Without this fix, further I2C access would
fail, even after proper pinctrl initialization.
Signed-off-by: Ondrej Jirman <megi@xff.cz> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Nishanth Menon [Tue, 16 May 2023 23:06:21 +0000 (18:06 -0500)]
arm: mach-k3: am625_init: Add Erratum WA for RTC startup
In the first silicon revision of the am62x family of SoCs, the hardware
wakeup event cannot be used if software is unable to unlock the RTC
device within one second after boot. To work around this limitation
unlock RTC as soon as possible in the boot flow to maximize our chance
of linux being able to use this device.
Add the erratum i2327 workaround to initialize the RTC.
Signed-off-by: Nishanth Menon <nm@ti.com>
[bb@ti.com: rebased from 2021.01 and expanded commit and code messages] Signed-off-by: Bryan Brattlof <bb@ti.com>
arm: mach-k3: arm64-mmu: do not map ATF and OPTEE regions in A53 MMU
ATF and OPTEE regions may be firewalled from non-secure entities.
If we still map them for non-secure A53, speculative access may happen,
which will not cause any faults and related error response will be ignored,
but it's better to not to map those regions for non-secure A53 as there
will be no actual access at all.
Create separate table as ATF region is at different locations for am64
and am62/am62a.
Udit Kumar [Thu, 11 May 2023 09:17:50 +0000 (14:47 +0530)]
arch: arm: mach-k3: j721e: add support for UDA FS
When selecting UDA partition for booting. MMC read
mode was selected as RAW.
Due to growing/changing size of u-boot and tispl
images.
It will be better change to FS in case of UDA FS instead of
adjusting offsets with new change.
Udit Kumar [Thu, 11 May 2023 09:17:49 +0000 (14:47 +0530)]
configs: j7200: correct mmc offset
This patch corrects the MMC raw mode sector offset.
Current allocated size for tiboot3 is 1MB and 2MB for tispl.
Without this correct offset eMMC boot will fail.
Fixes: f8c1e893c82 (configs: j7200_evm_a72: Add Initial suppot) Fixes: 02dff65efe7 (configs: j7200_evm_r5: Add initial support) Fixes: 360c7f46f39 (configs: Add configs for J7200 High Security EVM)
Way to test with eMMC boot from boot0/1 partition
Boot with SD card, copy images to eMMC boot0 or boot1 partition
projects / u-boot.git / log
![18 months agopinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configuration](/img/static/git-favicon.png?p=u-boot.git;a=commit;h=b597b6f9861c2d5531b0055249622ee0e663577c){kind=link}
