configs: rockchip: reduce diff for rk3308, rk3328, rk3399, rk3568, and rk3588
this is cosmetic change. no functional change is intended.
- remove redundant white spaces
- replace white spaces with tab
- align position of last letter/word
- sort lines in CFG_EXTRA_ENV_SETTINGS
- add comment after #endif
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
to an incorrect write mask.
Use a newly introduced constant for the write mask to fix this.
Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.
This fix is adapted from the upstream Linux commit by Sebastian Reichel: 55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits")
Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588") Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
phy: rockchip: snps-pcie3: Fix bifurcation for RK3588
Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues,
for example on the FriendlyElec CM3588 NAS board which uses bifurcation
on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe
sockets. Without this fix, NVMe devices do not get recognized.
Correct the `PHP_GRF_PCIESEL` register configuration and simplify the
bifurcation logic, enabling proper PCIe bifurcation based on the
data-lanes property.
This fix is adapted from the upstream Linux commit by Michal Tomek: f8020dfb311d ("phy: rockchip-snps-pcie3: fix bifurcation on rk3588")
Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588") Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
connector, a fan connector, IR receiver as well as some buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Kernel commit: f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC
storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125
2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a
HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Tested in U-Boot proper:
- Booting from eMMC works
- 1GbE Ethernet works using the eth_eqos driver (tested by ping)
- 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping),
but the status LEDs on this specific port currently aren't working
- NVMe SSD in M.2 socket does get recognized (tested with `nvme scan`
followed by `nvme details`)
Kernel commit: d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
This enables PCIe support on Tiger as exposed on
Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI
Express` connector on the Haikou devkit.
This was tested with a PCIe to NVMe adapter (e.g.
https://www.amazon.de/dp/B07RZZ3TJG).
rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support
Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
PHY on RK3588.
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
it's required only for the M.2 E-KEY slot on the main PCB, but that is
used typically for WiFi+BT modules, or on the mezzanine connector but
the features exposed behind that connector aren't supported in U-Boot
(no DT for it right now). However, if the PHY driver is missing, we get
the following error message:
pcie_dw_rockchip pcie@fe170000: failed to get pcie phy (ret=-19)
and you would need to know which PCIe controller that is before deciding
to ignore it. While after enabling the PHY driver, we are greeted with:
pcie_dw_rockchip pcie@fe170000: PCIe-2 Link Fail
which is a bit more acceptable (to me).
The other option would be to disable the PCIe2 PHYs/controllers in the
DT, which I'm not too fond of.
arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar
The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
In contrast to a number of other boards the pcie-refclk is gpio-controlled,
so the necessary clock and is added to the list of pcie3 clocks.
Jagan Teki [Sat, 22 Jun 2024 18:21:49 +0000 (23:51 +0530)]
phy: rockchip: inno-hdmi: Fix missing readl base addr
inno_poll passes the reg offset that is used by readl_poll_sleep_timeout
without any base addr.
Fix it.
Bug:
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)
Fixes: aa2271184603 ("phy: rockchip: Add Rockchip INNO HDMI PHY driver") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Thu, 20 Jun 2024 10:24:51 +0000 (12:24 +0200)]
rockchip: remove support for Theobroma Systems RK3368 Lion
No meaningful changes were made to this SoM since February 2021. Nobody
from Theobroma has booted anything recent on that product since July
2021 at the latest. The product isn't available to buy anymore and
disappeared from our website.
This product is therefore unmaintained and it would be disingenuous to
say the opposite, so drop support for RK3368 Lion.
If you're a user of Lion, feel free to revert this patch or contact our
sales/support department.
Quentin Schulz [Thu, 20 Jun 2024 10:24:50 +0000 (12:24 +0200)]
rockchip: theobroma-systems: migrate git URLs to HTTPS
It turns out only Puma had a working git:// URL. Though that is now
fixed, having HTTPS URLs make it easier to directly reach our cgit
webserver to check what's up without having to change the URL manually.
Depending on your terminal settings, this also makes it possible to
open the link from it.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Wed, 19 Jun 2024 15:44:56 +0000 (17:44 +0200)]
rockchip: puma-rk3399: increase Ethernet PHY timeout to 30s
On Puma v2.1 with a KSZ9031, the Ethernet PHY often doesn't detect the
link in the 4-second default timeout.
After some boot-loop test for about a thousand boots, 70% were below
10s, 90% below 15s and 100% below 30s. Let's play it safe and make it
30s so that hopefully all links that should be detected are.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Mon, 17 Jun 2024 16:48:51 +0000 (18:48 +0200)]
power: rk8xx: fix display name for RK808
Commit 2ce40542e0eb ("power: rk8xx: properly print all supported PMICs
name") fixed all PMICs name that were broken but broke the only one that
was not broken already: RK808. This one is a special case because the ID
registers are marked as reserved and always return 0, so the variant
cannot be derived the same way it is done for other PMICs from Rockchip.
Quentin Schulz [Mon, 17 Jun 2024 13:10:08 +0000 (15:10 +0200)]
rockchip: rk3399: fix SPI-NOR flash not found in U-Boot pre-reloc
In commit 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card
when booting from eMMC"), the spi1 bootph properties were mistakenly
removed meaning, so re-add them back to fix SPI-NOR flash not being
found in U-Boot pre-reloc as required for RK3399 Puma.
Fixes: 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Fri, 14 Jun 2024 16:54:14 +0000 (18:54 +0200)]
rockchip: ringneck-px30: enable IO domain
Enable the IO domain on Ringneck. Based on the current HW design, this
should do nothing else than making sure vccio6 iodomain is controlled by
the GRF and not GPIO0B6.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Fri, 14 Jun 2024 16:54:13 +0000 (18:54 +0200)]
rockchip: io-domain: add support for PX30
Port the PX30 part of the Rockchip IO Domain driver from Linux.
This differs from linux version in that the io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supplies that have been configured.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Fri, 14 Jun 2024 11:04:55 +0000 (13:04 +0200)]
rockchip: px30: imply ARMV8_CRYPTO
PX30 supports ARMv8 Cryptography Extensions so let's enable it by
default for all PX30 to make FIT verification when enabled much faster.
While A35 shouldn't be impacted by ARMV8_SET_SMPEN cache coherency
according to the Kconfig help text, let's enable it just in case since
it exists in the documentation[1].
For u-boot part of the FIT image, it is now taking 5ms against currently
35ms. fdt-1 check lowered from 3ms to <1ms. atf-1 from 6ms to <1ms.
Quentin Schulz [Fri, 14 Jun 2024 11:04:53 +0000 (13:04 +0200)]
rockchip: ringneck-px30: disable broken USB gadget
USB gadget simply doesn't work right now on PX30. Tested on PX30 EVB and
PX30 Ringneck with Linux mainline and Rockchip 5.10 Linux as well as
U-Boot.
We don't want to our users to assume that USB gadget is supported on Q7
USB P1 on Ringneck Haikou, so let's remove its support, which also
removes the ums CLI command, fastboot and Android image booting
support.
Tom Rini [Sat, 13 Jul 2024 14:38:38 +0000 (08:38 -0600)]
turris_1x: Normalize Kconfig usage
We don't set many options in the board Kconfig entry file but instead
use defconfigs, select in some cases on the target itself, or update the
"default" options of the main entries when needed. In this case we can
remove most of the board Kconfig entries and just add them to the
defconfig like other platforms.
Tom Rini [Fri, 12 Jul 2024 19:07:54 +0000 (13:07 -0600)]
Merge patch series "Add Turris 1.x board"
Marek Mojík <marek.mojik@nic.cz> says:
Hello all,
this is a continuation of previous work by Pali to add support for the
Turris 1.x board. As the patches were based on u-boot v2022.04, a
nontrivial rebasing was needed.
Some notes:
- Some options that are in SD defconfig are disabled in NOR defconfig
because over the years u-boot grew and the old NOR defconfig will not
fit into NOR memory.
- SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We
were not able to fix this yet)
Pali Rohár [Thu, 6 Jun 2024 16:33:26 +0000 (18:33 +0200)]
powerpc: Add support for CZ.NIC Turris 1.x routers
Add support for CZ.NIC Turris 1.x routers.
CZ.NIC Turris 1.0 (RTRS01) and 1.1 (RTRS02) are open source routers, they
have dual-core PowerPC Freescale P2020 CPU and are based on reference
Freescale P2020RDB-PC-A board design.
Hardware design is fully open source, all firmware and hardware design
files are available at Turris project website:
The P2020 BootROM can load U-Boot either from NOR flash or from SD card.
We add the new defconfigs, turris_1x_nor_defconfig, which configures
U-Boot for building the NOR image, and turris_1x_sdcard_defconfig, which
configures U-Boot for building an image suitable for SD card.
The defconfig for NOR image is stripped-down a - many config options
enabled in SD defconfig are disabled for NOR defconfig. This is because
U-Boot grew non-trivially in the last two years and it would not fit
into the space allocated for U-Boot in the NOR memory. In the future we
may try to use LTO to reduce the size of the code and enable more
options.
The design of CZ.NIC Turris 1.x routers is based on Freescale P2020RDB-PC-A
board, so some code from boards/freescale/p1_p2_rdb_pc is used and linked
into Turris 1.x board code.
Turris 1.x code in this patch uses modern distroboot and can boot Linux
kernel from various locations, including NAND, SD card, USB flash disks,
NVMe disks or SATA disks (connected to extra SATA/SCSI PCIe controllers).
Via distroboot is implemented also rescue NOR boot for factory recovery,
triggered by reset button, like on other existing Turris routers.
SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We were
not able to fix this yet)
[ Because various CONFIG_ macros were migrated to Kconfig since the last
time this worked on upstream U-Boot (in 2022), a non-trivial rebasing
was needed and some issues were solved. ]
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
Marek Mojík [Thu, 6 Jun 2024 16:33:25 +0000 (18:33 +0200)]
powerpc: use CONFIG_IS_ENABLED() when checking for DM_SERIAL in include/asm/config.h
Use the CONFIG_IS_ENABLED() macro when checking for DM_SERIAL so that
CFG_SYS_NS16550_CLK is not defined as get_serial_clock() in SPL if SPL
does not have DM_SERIAL enabled.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
Pali Rohár [Thu, 6 Jun 2024 16:33:23 +0000 (18:33 +0200)]
powerpc: mpc8xxx: Extend find_law() to find_law_by_addr_id()
The find_law() function searches for LAW just by physical address. This
is unsuitable for cases with overlapping LAWs. Extend it to
find_law_by_addr_id(), which searches for LAW by physical address and
target id.
Add a static inline definition of the original find_law() into fsl_law.h
header.
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
Pali Rohár [Thu, 6 Jun 2024 16:33:21 +0000 (18:33 +0200)]
board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP images
When U-Boot is running from flash memory (execute in place) then
gd->fdt_blob before relocation points to read-only flash memory.
So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer which
cause immediate CPU crash when callback is trying to modify gd->fdt_blob.
Fix this issue by introducing a new config option OF_INITIAL_DTB_READONLY
which moves fix_fdt callback after the reloc_fdt callback. This makes
CONFIG_OF_BOARD_FIXUP working also if U-Boot before relocation is not
running from read/write (S)RAM memory.
This is required for mpc85xx boards when booting from flash NOR.
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
This was added in commit 45a6d231b2f (bcm2835_wdt: support for the
BCM2835/2836 watchdog), which did do 'select HW_WATCHDOG'. That
incarnation of the watchdog driver later got removed in c7adc0b5f98 (watchdog: bcm2835_wdt: Remove unused BCM283x watchdog
driver and its references), but this block was left behind.
Another rpi watchdog driver has since been added, but that does not
select HW_WATCHDOG, so this remains dead and unused. Remove it.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
This empty stub was originally added as one branch of an #ifdef in
commit 45a6d231b2f (bcm2835_wdt: support for the BCM2835/2836
watchdog). That incarnation of the rpi watchdog driver was later
removed in c7adc0b5f98 (watchdog: bcm2835_wdt: Remove unused BCM283x
watchdog driver and its references), but this now unused stub was left
behind. The later (re-)added rpi watchdog driver does not define a
hw_watchdog_disable() function, as that is properly integrated in the
watchdog framework.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
With the ability to generate this SMBIOS details autmotically the
small amount of details that this patch provided are generated
automatically so this is now obsolete so we can just drop it.
Usb gadget:
- A welcome cleanup: epautoconf workaround is dropped to use
.match_ep() instead
- Introduce handle_interrupts() op for USB_GADGET_GENERIC, which
allows a per-driver interrupt handling
Fastboot:
- Fix mssing include when building with TCP only
The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
line to be connected for proper functioning.
In cases where this can't be connected, add a quirk to force the
controller into test mode and set the TESTCD bit. Use the flag
"ti,fails-without-test-cd", to implement this above quirk when required.
Additionally, this quirk also avoids waiting for the controller debounce
time.
This commit is similar to linux kernel commit c7666240ec76
("drivers: mmc: sdhci_am654: Add the quirk to set TESTCD bit").
When building with the igep00x0_defconfig, the following warning is shown:
$ make -j $(nproc)
...
LD spl/u-boot-spl
OBJCOPY spl/u-boot-spl-nodtb.bin
SYM spl/u-boot-spl.sym
CAT spl/u-boot-spl-dtb.bin
COPY spl/u-boot-spl.bin
MKIMAGE MLO
===================== WARNING ======================
This board does not use CONFIG_DM_I2C (Driver Model
for I2C drivers). Please update the board to use
CONFIG_DM_I2C before the v2022.04 release. Failure to
update by the deadline may result in board removal.
See doc/develop/driver-model/migration.rst for more info.
====================================================
The only reason why I2C is enabled for the IGEP boards is that the TWL4030
driver requires it.
But both the TWL4034 and the OMAP I2C controller drivers were converted to
the driver model by commits daa69ffe3d4d ("drivers: i2c: omap24xx_i2c:
adopt omap_i2c driver to driver model") and fb1b7712ad3f power: make most
tps drivers and the twl4030 driver compatible with DM_I2C") respectively.
So there's no reason anymore to keep using the I2C legacy API and instead
the DM_I2C option could just be enabled.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
pinctrl: mediatek: mt7981: init device before relocation
Upstream kernel linux define pinctrl for uart0, hence this pin group
and pinctrl driver is needed before relocation. Add DM_FLAG_PRE_RELOC
flag to init and mute mtk_serial error on early serial init.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
pinctrl: mediatek: add support for gpio-controller property in root node
Add support for gpio-controller property in root pinctrl node.
This is to follow upstream linux DTSI that doesn't define the
gpio-controller and cells in dedicated nodes.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
serial: mediatek: add special handling for highspeed and linux compat
Upstream linux serial driver use a different logic to setup serial regs.
They have 2 interval:
- < 115200 we use lowspeed regs and 16 * baud
- >= 115200 we use highspeed
We currently use force_highspeed property to force usage of highspeed
regs even with low baud rate.
Add special handling if the upstream compatible is used where we just
apply the same interval with anything >= 115200 in highspeed simulating
force_highspeed.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
spi: mtk_spim: add support for upstream mediatek, spi-ipm compatible
Upstream kernel linux use a different compatible mediatek,spi-ipm.
Add support for this compatible and add handling for the additional
clock similar to how it's done by the upstream driver and handling for
all the property enabled by default.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tom Rini [Fri, 5 Jul 2024 20:34:07 +0000 (14:34 -0600)]
Revert "buildman: Always use the full path in CROSS_COMPILE"
There are operations in buildman that result in running the cross-tools
(such as performing size checks) and now that we have not modified PATH
to know where our tools are, these operations fail.
Tom Rini [Mon, 8 Jul 2024 14:47:00 +0000 (08:47 -0600)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add mvebu_espressobin_ultra-88f3720_defconfig (Benjamin)
- Update DTS for Thecus N2350 board (Tony)
- Add "old" Marvell DDR3 training for Armada 38x and Turris Omnia
(Marek)
- Misc turris_omnia changes (Marek)
- Fixes for i.MX8M and i.MX93 clk-composite.
- Set CAN oscillator frequency based on model on verdin-imx8mm.
- Enable CAAM for phycore-imx8mp_defconfig.
- Miscellaneous improvements for Gateworks i.MX8M boards.
- Fix initramfs boot on msc_sm2s_imx8mp.
- Fixe EQoS on imx8mp-beacon-kit.
- Fix error message in fsl_esdhc_imx.
Robert Marko [Fri, 21 Jun 2024 09:46:02 +0000 (11:46 +0200)]
mvebu: armada-8k: respect CONFIG_DISTRO_DEFAULTS
Currently, Armada 8k config header is setting boot devices and including
<config_distro_bootcmd.h> regardless of the CONFIG_DISTRO_DEFAULTS being
enabled or not, thus populating the environment for distro boot even on
devices that have no need for it.
So, lets simply respect the value of CONFIG_DISTRO_DEFAULTS.
Marek Behún [Tue, 18 Jun 2024 15:34:39 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Support old DDR3 training
Support old DDR3 training code on Turris Omnia, selectable via EEPROM
field.
Users experiencing DDR3 initialization failures or random crashes of the
operating system due to incorrect DDR3 configuration can select the old
DDR3 training implementation to fix those issues by setting the EEPROM
field "Use old DDR training":
eeprom update "Use old DDR training" 1
Marek Behún [Tue, 18 Jun 2024 15:34:38 +0000 (17:34 +0200)]
arm: mvebu: a38x: Add optional support for using old DDR3 training code
Add optional support for using old DDR3 training code from 2017.
The code lives in drivers/ddr/marvell/a38x/old/. To prevent symbol
clashing with new DDR3 training code, a special header which renames all
clashing symbols via macros is included and the symbols are prefixed
with 'old_'.
If old DDR3 training support is selected for a board, then the SPL
initialization code calls a new function
board_use_old_ddr3_training()
to check whether it should use old DDR3 training code. The default
weak implementation returns false, defaulting to new DDR3 training code.
Boards that wish to support this need to select the
ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING
config option and implement the old version of DDR topology provider,
ddr3_get_topology_map().
Marek Behún [Tue, 18 Jun 2024 15:34:35 +0000 (17:34 +0200)]
ddr: marvell: a38x: Import old DDR training code from 2017 version of U-Boot
Import DDR training code from commit 1b69ce2fc0ec ("arm: mvebu:
ddr3_debug: remove self assignments") into
drivers/ddr/marvell/a38x/old/. The code is not used yet.
Explanation:
Since 2019, on some Turris Omnia boards we have been having problems
with newer versions of Marvell's DDR3 training code for Armada 38x,
which is ported from mv-ddr-marvell [1] to U-Boot into the
drivers/ddr/marvell/a38x/ directory:
- sometimes the DDR3 training fails on some older boards, sometime it
fails on some newer boards
- other times it succeeds, but some boards experience crashes of the
operating system after running for some time.
Using the stock version of Turris Omnia's U-Boot from solved these
issues, but this solution was not satisfactory, since we wanted
features from new U-Boot.
Back in 2020-2022 we have spent several months trying to debug the
issues, working with Marvell, on our own, and also with U-Boot
community, but these issues persist still.
One solution we used back in 2019 was a "hybrid U-Boot": the SPL part
(containing the DDR3 training code) was taken from the stock version,
while the proper part was current U-Boot at the time. This solution also
has its drawbacks, of which the main one is the need to glue binaries
from two separate builds.
Since then there have been some more changes to the DDR3 training code
in upstream mv-ddr-marvell that have been ported to U-Boot. We have
provided our users experimental builds of U-Boot in the TurrisOS so that
they could try upgrading the firmware and let us know if those problems
still exist. And they do.
We do not have the time nor manpower to debug this problem and fix it
properly. Marvell was also no able to provide a solution to this,
probably because they do not have the manpower as well.
I have therefore come up with this "not that pretty" solution: take the
DDR3 training code from an older version of U-Boot that is known to
work, put it into current U-Boot under old/ subdirectory within
drivers/ddr/marvell/a38x/, build into the SPL binary both the old and
new versions and make it possible to select the old version via an env
variable.
Marek Behún [Tue, 18 Jun 2024 15:34:34 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Read DDR speed from EEPROM
Some Turris Omnia boards experience memory issues, and by
experimentation we found that some of these issues can be solved by
slowing DDR speed.
Add a new field in the extended EEPROM information structure, ddr_speed.
Support several values in this field (for now 1066F, 1333H, and the
default, 1600K) and use it to overwrite the DDR topology parameters
used by the DDR training algorithm.
Marek Behún [Tue, 18 Jun 2024 15:34:32 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Enable the 'eeprom' command
Enable the 'eeprom' command with support for EEPROM layout for Turris
Omnia. Enable the i2c-eeprom driver so that the EEPROM is accessed via
driver model.
For board revisions where the WAN ethernet PHY reset GPIO is controllable
via MCU we currently insert a phy-reset-gpios property into the ethernet
controller node. The mvneta driver parses this property and uses the
GPIO to reset the PHY.
But this phy-reset-gpios property is not a valid DT binding in upstream
kernel. Instead, a reset-gpios property should be inserted into the
ethernet PHY node. This correct DT binding is supported by the DM ETH PHY
U-Boot driver.
Insert the reset-gpios property into the WAN PHY node instead the
phy-reset-gpios property in WAN ETH node so that Linux will correctly use
the reset GPIO.
Enable the CONFIG_DM_ETH_PHY config option so that U-Boot will also use
the correct DT property.
Note: currently there are 4 ethernet controller drivers parsing the
wrong DT property: dwc_eth_qos, fex_mxc, mvneta and mvpp2. We should
convert all relevant device-trees to use reset-gpios so that we can get
rid of these drivers parsing this property.
Fixes: 1da53ae26afc ("arm: mvebu: turris_omnia: Add support for design with SW reset signals") Signed-off-by: Marek Behún <kabel@kernel.org>
Marek Behún [Tue, 18 Jun 2024 15:34:27 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if needed, and make them static
The variables is_validate_window_per_if, is_validate_window_per_pup,
sweep_cnt and is_run_leveling_sweep_tests are only used if
DDR_VIEWER_TOOL macro is defined, so define them only in that case.
Make them static since they are only used in ddr3_debug.c.
Marek Behún [Tue, 18 Jun 2024 15:34:25 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if we won't print anything
Return from ddr3_tip_print_log() early if we won't print anything
anyway.
This way the compiler can optimize away the VALIDATE_IF_ACTIVE() calls
in the for-loop, so if the SILENT_LIB macro is defined, no code is
generated for the rest of the function, which saves some space.
Tony Dinh [Mon, 10 Jun 2024 00:34:31 +0000 (17:34 -0700)]
arm: dts: mvebu: Update DTS for Thecus N2350 board
- Change the spi-max-frequency to 50000000 (50 Mhz). According to the
data sheet[1], the MX25L3205D max frequency is 86 Mhz. Using 50 Mhz in
the DTS to ensure u-boot is consistent with what Linux kernel expected.
- Update GPIO fan to conform to the latest DT binding.
Tony Dinh [Thu, 6 Jun 2024 00:12:01 +0000 (17:12 -0700)]
arm: mvebu: env_sf_get_env_addr() missing check for CONFIG_ENV_IS_IN_SPI_FLASH
The CONFIG_ENV_OFFSET is undefined if boot device is UART
(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART), or envs are not stored on flash
(CONFIG_ENV_IS_NOWHERE). Check for CONFIG_ENV_IS_IN_SPI_FLASH as the first
condition to determine whether env_sf_get_env_addr() should be provided.
The CORE/BUS root slice has following design, simplied graph:
The difference is core not have pre_div block.
A composite core/bus clk has 8 inputs for mux to select, saying clk[0-7].
It support target(smart) interface and normal interface. Target interface
is exported for programmer easy to configure ccm root. Normal interface
is also exported, but we not use it in our driver, because it will
introduce more complexity compared with target interface.
The mux in the upper pic is not the target interface MUX, target
interface MUX is hiding SEL_A and SEL_B. When you choose clk[0-7],
you are actually writing SEL_A or SEL_B depends on the internal
counter which will also control the internal "mux".
The target interface simplified as below which is used by Linux Kernel:
CLK[0-7]--->MUX-->Gate-->pre_div-->post_div
A requirement of the Target Interface's software is that the
target clock source is active, it means when setting SEL_A, the
current input clk to SEL_A must be active, same to SEL_B.
We touch target interface, but hardware logic actually also need
configure normal interface.
There will be system hang, when doing the following steps:
The initial state:
SEL_A/SEL_B are both sourcing from clk0, the internal counter
choose SEL_A.
1. switch mux from clk0 to clk1
The hardware logic will choose SEL_B and configure SEL_B to clk1.
SEL_A no changed.
2. gate off clk0
Disable clk0, then the input to SEL_A is off.
3. switch from clk1 to clk2
The hardware logic will choose SEL_A and configure SEL_A to clk2,
however the current SEL_A input clk0 is off, the system hang.
The solution to fix the issue is in step 1, write twice to
target interface MUX, it will make SEL_A/SEL_B both sources
from clk1, then no need to care about the state of clk0. And
finally system performs well.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Adam Ford [Thu, 4 Jul 2024 21:22:46 +0000 (16:22 -0500)]
ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS clock work-around
Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
the clocks for the DWMAC driver can be configured, and removing
them breaks operation.
Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock") Suggested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Before this commit, usb_get_descriptor() failed for some flakey USB
devices. We hereby adopt the more robust linux implementation [1].
For instance, for the "Alcor Micro Corp. Flash Drive" (VID 0x058f, PID
0x6387), the following behavior occurs from time to time:
=> usb start
starting USB...
Bus xhci_pci: Register 10000840 NbrPorts 16
Starting the controller
USB XHCI 1.20
scanning bus xhci_pci for devices... usb_new_device: Cannot read configuration, skipping device 058f:6387
Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
[1] From a38297e3fb012 (Linux 6.9), see
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/usb/core/message.c?h=v6.9#n781
projects / u-boot.git / log
