From: Wolfgang Denk Date: Mon, 27 Sep 2021 15:42:37 +0000 (+0200) Subject: WS cleanup: remove excessive empty lines X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-favicon.png?a=commitdiff_plain;h=c72231d2729cea8b683ef05d94c986ced36755b3;p=u-boot.git WS cleanup: remove excessive empty lines Signed-off-by: Wolfgang Denk --- diff --git a/README b/README index 1ef8010724..28eb920359 100644 --- a/README +++ b/README @@ -300,7 +300,6 @@ board_init_r(): - loads U-Boot or (in falcon mode) Linux - Configuration Options: ---------------------- diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index 3b41c7d49b..bb7d24b4b7 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -14,8 +14,6 @@ #include "sys_env_lib.h" #include "ctrl_pex.h" - - /* * serdes_seq_db - holds all serdes sequences, their size and the * relevant index in the data array initialized in serdes_seq_init diff --git a/arch/xtensa/include/asm/arch-dc232b/core.h b/arch/xtensa/include/asm/arch-dc232b/core.h index 92ea0dfe35..c1453f719e 100644 --- a/arch/xtensa/include/asm/arch-dc232b/core.h +++ b/arch/xtensa/include/asm/arch-dc232b/core.h @@ -127,8 +127,6 @@ #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ - - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ diff --git a/arch/xtensa/include/asm/arch-dc232b/tie-asm.h b/arch/xtensa/include/asm/arch-dc232b/tie-asm.h index 7003cad40d..35a26dca7c 100644 --- a/arch/xtensa/include/asm/arch-dc232b/tie-asm.h +++ b/arch/xtensa/include/asm/arch-dc232b/tie-asm.h @@ -26,7 +26,6 @@ #define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */ - /* Macro to save all non-coprocessor (extra) custom TIE and optional state * (not including zero-overhead loop registers). * Save area ptr (clobbered): ptr (1 byte aligned) @@ -109,11 +108,8 @@ .endif .endm // xchal_ncp_load - - #define XCHAL_NCP_NUM_ATMPS 2 - #define XCHAL_SA_NUM_ATMPS 2 #endif /*_XTENSA_CORE_TIE_ASM_H*/ diff --git a/arch/xtensa/include/asm/arch-dc233c/core.h b/arch/xtensa/include/asm/arch-dc233c/core.h index ca07d8ee21..4646cdbfb4 100644 --- a/arch/xtensa/include/asm/arch-dc233c/core.h +++ b/arch/xtensa/include/asm/arch-dc233c/core.h @@ -149,13 +149,10 @@ #define XCHAL_HAVE_PREFETCH 0 /* PREFCTL register */ - - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ - #ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY /*---------------------------------------------------------------------- diff --git a/arch/xtensa/include/asm/arch-dc233c/tie-asm.h b/arch/xtensa/include/asm/arch-dc233c/tie-asm.h index 317d4e1312..7b3d1f3c57 100644 --- a/arch/xtensa/include/asm/arch-dc233c/tie-asm.h +++ b/arch/xtensa/include/asm/arch-dc233c/tie-asm.h @@ -31,8 +31,6 @@ | ((ccuse) & XTHAL_SAS_ANYCC) \ | ((abi) & XTHAL_SAS_ANYABI) ) - - /* * Macro to save all non-coprocessor (extra) custom TIE and optional state * (not including zero-overhead loop registers). @@ -164,8 +162,6 @@ #define XCHAL_NCP_NUM_ATMPS 1 - - #define XCHAL_SA_NUM_ATMPS 1 #endif /*_XTENSA_CORE_TIE_ASM_H*/ diff --git a/arch/xtensa/include/asm/arch-de212/core.h b/arch/xtensa/include/asm/arch-de212/core.h index 7268692d0e..443fd459ca 100644 --- a/arch/xtensa/include/asm/arch-de212/core.h +++ b/arch/xtensa/include/asm/arch-de212/core.h @@ -206,13 +206,10 @@ #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ - - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ - #ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY /*---------------------------------------------------------------------- diff --git a/arch/xtensa/include/asm/cacheasm.h b/arch/xtensa/include/asm/cacheasm.h index 6d321f8866..69448cfff7 100644 --- a/arch/xtensa/include/asm/cacheasm.h +++ b/arch/xtensa/include/asm/cacheasm.h @@ -134,7 +134,6 @@ .endm - .macro ___flush_invalidate_dcache_range ar as at #if XCHAL_DCACHE_SIZE @@ -171,7 +170,6 @@ .endm - .macro ___flush_invalidate_dcache_page ar as #if XCHAL_DCACHE_SIZE diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c index 995c429601..9e0941cc9d 100644 --- a/board/freescale/ls1088a/ddr.c +++ b/board/freescale/ls1088a/ddr.c @@ -88,8 +88,6 @@ found: pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, pbsp->wrlvl_ctl_3); - - popts->half_strength_driver_enable = 0; /* * Write leveling override diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index b52d9610e9..75d317342f 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -158,7 +158,6 @@ Start Address End Address Definition Max size 0xE8000000 0xE801FFFF RCW (current bank) 128KB - Software configurations and board settings ------------------------------------------ 1. NOR boot: diff --git a/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c index 323835ab1b..c2a6f9199a 100644 --- a/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c @@ -12399,8 +12399,6 @@ unsigned long ps7_post_config_1_0[] = { // }; - - #include "xil_io.h" unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0; @@ -12477,8 +12475,6 @@ ps7_init() ret = ps7_config (ps7_ddr_init_data); if (ret != PS7_INIT_SUCCESS) return ret; - - // Peripherals init ret = ps7_config (ps7_peripherals_init_data); if (ret != PS7_INIT_SUCCESS) return ret; diff --git a/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c index 248c72861c..fd102a3ce4 100644 --- a/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c @@ -12732,8 +12732,6 @@ unsigned long ps7_post_config_1_0[] = { // }; - - #include "xil_io.h" unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0; @@ -12810,8 +12808,6 @@ ps7_init() ret = ps7_config (ps7_ddr_init_data); if (ret != PS7_INIT_SUCCESS) return ret; - - // Peripherals init ret = ps7_config (ps7_peripherals_init_data); if (ret != PS7_INIT_SUCCESS) return ret; diff --git a/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c index cc90a4c94b..796e5b0c5f 100644 --- a/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c @@ -12639,8 +12639,6 @@ unsigned long ps7_post_config_1_0[] = { // }; - - #include "xil_io.h" unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0; @@ -12717,8 +12715,6 @@ ps7_init() ret = ps7_config (ps7_ddr_init_data); if (ret != PS7_INIT_SUCCESS) return ret; - - // Peripherals init ret = ps7_config (ps7_peripherals_init_data); if (ret != PS7_INIT_SUCCESS) return ret; diff --git a/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c index 8fb3908e02..baf89a5800 100644 --- a/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c @@ -12297,8 +12297,6 @@ unsigned long ps7_post_config_1_0[] = { // }; - - #include "xil_io.h" unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0; @@ -12375,8 +12373,6 @@ ps7_init() ret = ps7_config (ps7_ddr_init_data); if (ret != PS7_INIT_SUCCESS) return ret; - - // Peripherals init ret = ps7_config (ps7_peripherals_init_data); if (ret != PS7_INIT_SUCCESS) return ret; diff --git a/cmd/bedbug.c b/cmd/bedbug.c index 549c9056dd..0bd67fcf47 100644 --- a/cmd/bedbug.c +++ b/cmd/bedbug.c @@ -39,7 +39,6 @@ int bedbug_puts (const char *str) } /* bedbug_puts */ - /* ====================================================================== * Initialize the bug_ctx structure used by the bedbug debugger. This is * specific to the CPU since each has different debug registers and @@ -53,7 +52,6 @@ int bedbug_init(void) } /* bedbug_init */ - /* ====================================================================== * Entry point from the interpreter to the disassembler. Repeated calls * will resume from the last disassembled address. @@ -183,7 +181,6 @@ void do_bedbug_breakpoint (struct pt_regs *regs) } /* do_bedbug_breakpoint */ - /* ====================================================================== * Called from the CPU-specific breakpoint handling routine. Enter a * mini main loop until the stopped flag is cleared from the breakpoint @@ -241,7 +238,6 @@ void bedbug_main_loop (unsigned long addr, struct pt_regs *regs) } /* bedbug_main_loop */ - /* ====================================================================== * Interpreter command to continue from a breakpoint. Just clears the * stopped flag in the context so that the breakpoint routine will diff --git a/doc/README.dfutftp b/doc/README.dfutftp index a3341bbb61..1206507911 100644 --- a/doc/README.dfutftp +++ b/doc/README.dfutftp @@ -88,7 +88,6 @@ for pure DFU USB transfer. possible to set large enough default buffer (8 MiB @ BBB) - FIT image format for download ----------------------------- @@ -110,7 +109,6 @@ should look like where "u-boot.bin" is the DFU entity name to be stored. - To do ----- diff --git a/doc/device-tree-bindings/firmware/linaro,optee-tz.txt b/doc/device-tree-bindings/firmware/linaro,optee-tz.txt index d38834c67d..2d75c2b1b5 100644 --- a/doc/device-tree-bindings/firmware/linaro,optee-tz.txt +++ b/doc/device-tree-bindings/firmware/linaro,optee-tz.txt @@ -21,7 +21,6 @@ the reference implementation maintained by Linaro. in drivers/tee/optee/optee_smc.h - Example: firmware { optee { diff --git a/drivers/gpio/hi6220_gpio.c b/drivers/gpio/hi6220_gpio.c index 608ad64f65..e287c31b93 100644 --- a/drivers/gpio/hi6220_gpio.c +++ b/drivers/gpio/hi6220_gpio.c @@ -54,8 +54,6 @@ static int hi6220_gpio_get_value(struct udevice *dev, unsigned gpio) return !!readb(bank->base + (BIT(gpio + 2))); } - - static const struct dm_gpio_ops gpio_hi6220_ops = { .direction_input = hi6220_gpio_direction_input, .direction_output = hi6220_gpio_direction_output, diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 5057bd9665..aa13af3ae1 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -772,8 +772,6 @@ void bus_i2c_init(int index, int speed, int unused, bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed); } - - /* * Init I2C Bus */ diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c index 00c3c6c412..5cc256bf20 100644 --- a/drivers/mtd/nand/raw/nand_util.c +++ b/drivers/mtd/nand/raw/nand_util.c @@ -545,8 +545,6 @@ int nand_verify(struct mtd_info *mtd, loff_t ofs, size_t len, u_char *buf) return rval ? -EIO : 0; } - - /** * nand_write_skip_bad: * diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 5bdcede8f1..4e34248ff6 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5251,11 +5251,7 @@ e1000_configure_tx(struct e1000_hw *hw) mdelay(20); } - - E1000_WRITE_REG(hw, TCTL, tctl); - - } /** diff --git a/drivers/video/stb_truetype.h b/drivers/video/stb_truetype.h index 5d00bff9fd..26f4ac2ca8 100644 --- a/drivers/video/stb_truetype.h +++ b/drivers/video/stb_truetype.h @@ -497,7 +497,6 @@ STBTT_DEF void stbtt_GetBakedQuad(stbtt_bakedchar *chardata, int pw, int ph, // // It's inefficient; you might want to c&p it and optimize it. - ////////////////////////////////////////////////////////////////////////////// // // NEW TEXTURE BAKING API diff --git a/fs/btrfs/kernel-shared/btrfs_tree.h b/fs/btrfs/kernel-shared/btrfs_tree.h index 6a76d1e456..d8eff0b912 100644 --- a/fs/btrfs/kernel-shared/btrfs_tree.h +++ b/fs/btrfs/kernel-shared/btrfs_tree.h @@ -334,7 +334,6 @@ #define BTRFS_STRING_ITEM_KEY 253 - /* 32 bytes in various csum fields */ #define BTRFS_CSUM_SIZE 32 diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 47617c2ab3..7831687114 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -106,7 +106,6 @@ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) - #undef COMMON_ENV_DFU_ARGS #define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ "setenv bootargs ${bootargs};" \ diff --git a/include/fsl-mc/fsl_dpni.h b/include/fsl-mc/fsl_dpni.h index 96d81d9934..e5e7338192 100644 --- a/include/fsl-mc/fsl_dpni.h +++ b/include/fsl-mc/fsl_dpni.h @@ -173,8 +173,6 @@ do { \ MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\ } while (0) - - /* cmd, param, offset, width, type, arg_name */ #define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \ do { \ diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index 666480db93..265e89f02b 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -52,7 +52,6 @@ typedef enum { } flstate_t; - /* NOTE: confusingly, this can be used to refer to more than one chip at a time, if they're interleaved. This can even refer to individual partitions on the same physical chip when present. */ diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index ef020ad162..dca7efa142 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -288,7 +288,6 @@ #define UART_ACR_ASREN 0x80 /* Additional status enable */ - /* * These definitions are for the RSA-DV II/S card, from *