From: Ye Li Date: Thu, 19 Sep 2024 04:01:33 +0000 (+0800) Subject: imx93: Add Low performance parts 9302/9301 support X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-favicon.png?a=commitdiff_plain;h=5ee773e60b3f5e024d1177d4be52c07d741c228d;p=u-boot.git imx93: Add Low performance parts 9302/9301 support Add support for iMX93 low performance parts 9302 and 9301 which restrict to low drive voltage only. The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU and A55 core1 (9301) disabled. Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan --- diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index cbd2717f97..b0468a1a13 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -68,6 +68,8 @@ #define MXC_CPU_IMX9321 0xC6 /* dummy ID */ #define MXC_CPU_IMX9312 0xC7 /* dummy ID */ #define MXC_CPU_IMX9311 0xC8 /* dummy ID */ +#define MXC_CPU_IMX9302 0xC9 /* dummy ID */ +#define MXC_CPU_IMX9301 0xCA /* dummy ID */ #define MXC_SOC_MX6 0x60 #define MXC_SOC_MX7 0x70 diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index d93e095e19..c146a223b7 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -85,7 +85,8 @@ struct bd_info; #define is_imx93() (is_cpu_type(MXC_CPU_IMX93) || is_cpu_type(MXC_CPU_IMX9331) || \ is_cpu_type(MXC_CPU_IMX9332) || is_cpu_type(MXC_CPU_IMX9351) || \ is_cpu_type(MXC_CPU_IMX9322) || is_cpu_type(MXC_CPU_IMX9321) || \ - is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311)) + is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311) || \ + is_cpu_type(MXC_CPU_IMX9302) || is_cpu_type(MXC_CPU_IMX9301)) #define is_imx9351() (is_cpu_type(MXC_CPU_IMX9351)) #define is_imx9332() (is_cpu_type(MXC_CPU_IMX9332)) #define is_imx9331() (is_cpu_type(MXC_CPU_IMX9331)) @@ -93,6 +94,8 @@ struct bd_info; #define is_imx9321() (is_cpu_type(MXC_CPU_IMX9321)) #define is_imx9312() (is_cpu_type(MXC_CPU_IMX9312)) #define is_imx9311() (is_cpu_type(MXC_CPU_IMX9311)) +#define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302)) +#define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301)) #define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020)) #define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050)) diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index e892da80fe..63e75b6806 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -30,6 +30,7 @@ choice config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" + select OF_BOARD_FIXUP select IMX93 imply OF_UPSTREAM diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index e3bfc8d51c..6364709278 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -191,6 +191,10 @@ static u32 get_cpu_variant_type(u32 type) bool core1_disable = !!(val & BIT(15)); u32 pack_9x9_fused = BIT(4) | BIT(17) | BIT(19) | BIT(24); + /* Low performance 93 part */ + if (((val >> 6) & 0x3F) == 0xE && npu_disable) + return core1_disable ? MXC_CPU_IMX9301 : MXC_CPU_IMX9302; + if ((val2 & pack_9x9_fused) == pack_9x9_fused) type = MXC_CPU_IMX9322; @@ -704,7 +708,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) if (fixup_thermal_trips(blob, "cpu-thermal")) printf("Failed to update cpu-thermal trip(s)"); - if (is_imx9351() || is_imx9331() || is_imx9321() || is_imx9311()) + if (is_imx9351() || is_imx9331() || is_imx9321() || is_imx9311() || is_imx9301()) disable_cpu_nodes(blob, nodes_path, 1, 2); if (is_voltage_mode(VOLT_LOW_DRIVE)) diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 60deca963a..6c0a8c0cbe 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -60,6 +60,10 @@ static const char *get_imx_type_str(u32 imxtype) return "93(12)";/* iMX93 9x9 Dual core without NPU */ case MXC_CPU_IMX9311: return "93(11)";/* iMX93 9x9 Single core without NPU */ + case MXC_CPU_IMX9302: + return "93(02)";/* iMX93 900Mhz Low performance Dual core without NPU */ + case MXC_CPU_IMX9301: + return "93(01)";/* iMX93 900Mhz Low performance Single core without NPU */ default: return "??"; }