From: Peter Tyser <ptyser@xes-inc.com>
Date: Mon, 27 Oct 2008 21:42:00 +0000 (-0500)
Subject: 85xx: Update MPC85xx_PORDEVSR_IO_SEL mask
X-Git-Tag: v2025.01-rc5-pxa1908~21758
X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-favicon.png?a=commitdiff_plain;h=4442f45b0e1cbad35aa22d4cad22b90a57e3f32d;p=u-boot.git

85xx: Update MPC85xx_PORDEVSR_IO_SEL mask

The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad3009901e..4892d8b8c4 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1568,7 +1568,7 @@ typedef struct ccsr_gur {
 #define MPC85xx_PORDEVSR_SGMII3_DIS	0x08000000
 #define MPC85xx_PORDEVSR_SGMII4_DIS	0x04000000
 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL   0x38000000
-#define MPC85xx_PORDEVSR_IO_SEL		0x00380000
+#define MPC85xx_PORDEVSR_IO_SEL		0x00780000
 #define MPC85xx_PORDEVSR_PCI2_ARB	0x00040000
 #define MPC85xx_PORDEVSR_PCI1_ARB	0x00020000
 #define MPC85xx_PORDEVSR_PCI1_PCI32	0x00010000