From: Sean Anderson Date: Fri, 16 Oct 2020 22:57:50 +0000 (-0400) Subject: spi: dw: Add SoC-specific compatible strings X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-favicon.png?a=commitdiff_plain;h=237e5880f8778ef2d26d029f53b57df56a72db4e;p=u-boot.git spi: dw: Add SoC-specific compatible strings This adds SoC-specific compatible strings to all users of the designware spi device. This will allow for the correct driver to be selected for each device. Where it is publicly documented, a compatible string for the specific device version has also been added. Devices without publicly-documented device versions include MSCC SoCs, and Arc Socs. All compatible strings except those for SoCFPGAs and some of the versioned strings have been taken from Linux. Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly necessary. However, it is a good cleanup and brings things closer to Linux. Signed-off-by: Sean Anderson Tested-by Eugeniy Paltsev Reviewed-by: Jagan Teki --- diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi index daf7ca68fb..d4ff4f7039 100644 --- a/arch/arc/dts/axs10x_mb.dtsi +++ b/arch/arc/dts/axs10x_mb.dtsi @@ -90,7 +90,7 @@ }; spi0: spi@0 { - compatible = "snps,dw-apb-ssi"; + compatible = "snps,axs10x-spi", "snps,dw-apb-ssi"; reg = <0x0 0x100>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi index a4b348b948..3fc82e57d7 100644 --- a/arch/arc/dts/hsdk-common.dtsi +++ b/arch/arc/dts/hsdk-common.dtsi @@ -128,7 +128,7 @@ }; spi0: spi@f0020000 { - compatible = "snps,dw-apb-ssi"; + compatible = "snps,hsdk-spi", "snps,dw-apb-ssi"; reg = <0xf0020000 0x1000>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index eda558f2fe..ff79d335ac 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -804,7 +804,8 @@ }; spi0: spi@fff00000 { - compatible = "snps,dw-apb-ssi"; + compatible = "altr,socfpga-spi", "snps,dw-apb-ssi-3.20", + "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xfff00000 0x1000>; @@ -816,7 +817,8 @@ }; spi1: spi@fff01000 { - compatible = "snps,dw-apb-ssi"; + compatible = "altr,socfpga-spi", "snps,dw-apb-ssi-3.20", + "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xfff01000 0x1000>; diff --git a/arch/arm/dts/socfpga_agilex.dtsi b/arch/arm/dts/socfpga_agilex.dtsi index 179b4d5591..c3ead2d72b 100644 --- a/arch/arm/dts/socfpga_agilex.dtsi +++ b/arch/arm/dts/socfpga_agilex.dtsi @@ -366,7 +366,8 @@ }; spi0: spi@ffda4000 { - compatible = "snps,dw-apb-ssi"; + compatible = "intel,agilex-spi", + "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda4000 0x1000>; @@ -379,7 +380,8 @@ }; spi1: spi@ffda5000 { - compatible = "snps,dw-apb-ssi"; + compatible = "intel,agilex-spi", + "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda5000 0x1000>; diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index a598c75542..bab34ab56c 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -604,7 +604,8 @@ }; spi0: spi@ffda4000 { - compatible = "snps,dw-apb-ssi"; + compatible = "altr,socfpga-arria10-spi", + "snps,dw-apb-ssi-3.22a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda4000 0x100>; @@ -617,7 +618,8 @@ }; spi1: spi@ffda5000 { - compatible = "snps,dw-apb-ssi"; + compatible = "altr,socfpga-arria10-spi", + "snps,dw-apb-ssi-3.22a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda5000 0x100>; diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi index cb799bc551..7a7777202c 100755 --- a/arch/arm/dts/socfpga_stratix10.dtsi +++ b/arch/arm/dts/socfpga_stratix10.dtsi @@ -268,7 +268,8 @@ }; spi0: spi@ffda4000 { - compatible = "snps,dw-apb-ssi"; + compatible = "intel,stratix10-spi", + "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda4000 0x1000>; @@ -281,7 +282,8 @@ }; spi1: spi@ffda5000 { - compatible = "snps,dw-apb-ssi"; + compatible = "intel,stratix10-spi", + "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda5000 0x1000>; diff --git a/arch/mips/dts/mscc,jr2.dtsi b/arch/mips/dts/mscc,jr2.dtsi index 7f5a96fecd..c44e9a2b3a 100644 --- a/arch/mips/dts/mscc,jr2.dtsi +++ b/arch/mips/dts/mscc,jr2.dtsi @@ -94,7 +94,7 @@ spi0: spi-master@101000 { #address-cells = <1>; #size-cells = <0>; - compatible = "snps,dw-apb-ssi"; + compatible = "mscc,jaguar2-spi", "snps,dw-apb-ssi"; reg = <0x101000 0x40>; num-chipselect = <4>; bus-num = <0>; diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi index 9a187b6e58..aeb4bf8f4b 100644 --- a/arch/mips/dts/mscc,ocelot.dtsi +++ b/arch/mips/dts/mscc,ocelot.dtsi @@ -100,7 +100,7 @@ spi0: spi-master@101000 { #address-cells = <1>; #size-cells = <0>; - compatible = "snps,dw-apb-ssi"; + compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi"; reg = <0x101000 0x40>; num-chipselect = <4>; bus-num = <0>; diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index 81ef8ca4f7..fce98b0fc3 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -284,7 +284,8 @@ }; spi2: spi@50240000 { - compatible = "kendryte,k120-spislave", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; spi-slave; reg = <0x50240000 0x100>; @@ -557,7 +558,8 @@ spi0: spi@52000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; reg = <0x52000000 0x100>; interrupts = <1>; @@ -573,7 +575,8 @@ spi1: spi@53000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", + compatible = "canaan,kendryte-k210-spi", + "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; reg = <0x53000000 0x100>; interrupts = <2>; @@ -589,8 +592,8 @@ spi3: spi@54000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "kendryte,k210-spi", - "snps,dw-apb-ssi"; + compatible = "canaan,kendryte-k210-ssi", + "snps,dwc-ssi-1.01a"; reg = <0x54000000 0x200>; interrupts = <4>; clocks = <&sysclk K210_CLK_SPI3>;