]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
pinctrl: mediatek: Bind gpio while binding pinctrl
authorChris Webb <chris@arachsys.com>
Wed, 31 Jul 2024 10:01:31 +0000 (11:01 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 7 Oct 2024 21:09:55 +0000 (15:09 -0600)
Mediatek pinctrl drivers call mtk_gpiochip_register() to bind the child
gpio controller as part of mtk_pinctrl_common_probe(). This breaks
gpiohog support because the gpio controller is bound too late for
DM_FLAG_PROBE_AFTER_BIND (set while binding hogs) to work.

Move the mtk_gpiochip_register() to mtk_pinctrl_common_bind() and call
this as the .bind method of each of the mediatek pinctrl drivers.

Signed-off-by: Chris Webb <chris@arachsys.com>
drivers/pinctrl/mediatek/pinctrl-mt7622.c
drivers/pinctrl/mediatek/pinctrl-mt7623.c
drivers/pinctrl/mediatek/pinctrl-mt7629.c
drivers/pinctrl/mediatek/pinctrl-mt7981.c
drivers/pinctrl/mediatek/pinctrl-mt7986.c
drivers/pinctrl/mediatek/pinctrl-mt7988.c
drivers/pinctrl/mediatek/pinctrl-mt8512.c
drivers/pinctrl/mediatek/pinctrl-mt8516.c
drivers/pinctrl/mediatek/pinctrl-mt8518.c
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
drivers/pinctrl/mediatek/pinctrl-mtk-common.h

index 114f2602b287eddfab0039caae7bc39863e996ca..46a5b6637c9ffac4af23efad41ad1fbda897fc11 100644 (file)
@@ -749,6 +749,7 @@ U_BOOT_DRIVER(mt7622_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7622_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7622_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index 2703e6f754c15aae170f9220cee243d22c73a483..55e49a790e46db9f66744932d616302569142af3 100644 (file)
@@ -1410,6 +1410,7 @@ U_BOOT_DRIVER(mt7623_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7623_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7623_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index 45d4def316d4579d6284e864ef4c336678b6315b..3b82423c1454df9ebb83b8bb97ec9a9bb1340d2e 100644 (file)
@@ -413,6 +413,7 @@ U_BOOT_DRIVER(mt7629_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7629_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7629_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index 4bc4abe6518713f94cf153bbdd44555e0c47919a..047e37bc9cde927cd0a7ef53e32204f782db0390 100644 (file)
@@ -1048,6 +1048,7 @@ U_BOOT_DRIVER(mt7981_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7981_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7981_probe,
        .priv_auto = sizeof(struct mtk_pinctrl_priv),
        .flags = DM_FLAG_PRE_RELOC,
index 819d64488f3f7ec0b99576f95a5c7048ed591ad4..bf8cd037535f66b257608ef71571df64e76b389b 100644 (file)
@@ -773,6 +773,7 @@ U_BOOT_DRIVER(mt7986_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7986_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7986_probe,
        .priv_auto = sizeof(struct mtk_pinctrl_priv),
 };
index 03a38e83dfa6f31ef195f4e41eb30a473c4ad513..1f384e86f4eec72231f0b899cede1aff7ce10ee6 100644 (file)
@@ -1269,6 +1269,7 @@ U_BOOT_DRIVER(mt7988_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt7988_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt7988_probe,
        .priv_auto = sizeof(struct mtk_pinctrl_priv),
 };
index bc5fb83ac685c17285ea4cd7ca466360e21298c2..5a8dd4ddd406a58dbcf9370599177997b5599de9 100644 (file)
@@ -382,6 +382,7 @@ U_BOOT_DRIVER(mt8512_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt8512_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt8512_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index 7487d6f0605f49530a80fe1d0f0127b63a10fa2f..9c25066fc2dd76f8c2e2026203d5b662f6db8b4a 100644 (file)
@@ -388,6 +388,7 @@ U_BOOT_DRIVER(mt8516_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt8516_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt8516_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index 66fcfdff14491ba8f619d8f66305d21975b7a4cb..333184a6bb21da18edbac23a6b030b1e07fcfe2d 100644 (file)
@@ -408,6 +408,7 @@ U_BOOT_DRIVER(mt8518_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = mt8518_pctrl_match,
        .ops = &mtk_pinctrl_ops,
+       .bind = mtk_pinctrl_common_bind,
        .probe = mtk_pinctrl_mt8518_probe,
        .priv_auto      = sizeof(struct mtk_pinctrl_priv),
 };
index ede3959c94f0ee4234433eb07b1d072ff1d3c58c..a3662d46bde1709eecfd393364b223e73277bc5b 100644 (file)
@@ -791,11 +791,20 @@ bind:
 }
 #endif
 
+int mtk_pinctrl_common_bind(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(DM_GPIO) || \
+    (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
+       return mtk_gpiochip_register(dev);
+#else
+       return 0;
+#endif
+}
+
 int mtk_pinctrl_common_probe(struct udevice *dev,
                             const struct mtk_pinctrl_soc *soc)
 {
        struct mtk_pinctrl_priv *priv = dev_get_priv(dev);
-       int ret = 0;
        u32 i = 0;
        fdt_addr_t addr;
        u32 base_calc = soc->base_calc;
@@ -813,10 +822,5 @@ int mtk_pinctrl_common_probe(struct udevice *dev,
                priv->base[i] = (void __iomem *)addr;
        }
 
-#if CONFIG_IS_ENABLED(DM_GPIO) || \
-    (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
-       ret = mtk_gpiochip_register(dev);
-#endif
-
-       return ret;
+       return 0;
 }
index c948b808434bbf019e700ad942257271d4a0c1c9..15ab3c1bf073bd6e5022f019a7a6102e8cd272c8 100644 (file)
@@ -241,6 +241,7 @@ extern const struct pinctrl_ops mtk_pinctrl_ops;
 /* A common read-modify-write helper for MediaTek chips */
 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
 void mtk_i_rmw(struct udevice *dev, u8 i, u32 reg, u32 mask, u32 set);
+int mtk_pinctrl_common_bind(struct udevice *dev);
 int mtk_pinctrl_common_probe(struct udevice *dev,
                             const struct mtk_pinctrl_soc *soc);