dm: pci: Make ranges dt property optional

If we use U-Boot as coreboot payload with a generic dts without
any ranges specified we fail in pci pre_probe and our pci bus
is not usable.

So convert decode_regions(..) into a void function and do the simple
error handling there.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message and checkpatch warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 1cd1e409e3eeaa11ce99adab149c648a576e5c60..de4c71bf886ce40384dfda51e9e900c199371968 100644 (file)
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -810,8 +810,8 @@ error:
        return ret;
 }
 
-static int decode_regions(struct pci_controller *hose, ofnode parent_node,
-                         ofnode node)
+static void decode_regions(struct pci_controller *hose, ofnode parent_node,
+                          ofnode node)
 {
        int pci_addr_cells, addr_cells, size_cells;
        int cells_per_record;
@@ -820,8 +820,11 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
        int i;
 
        prop = ofnode_get_property(node, "ranges", &len);
-       if (!prop)
-               return -EINVAL;
+       if (!prop) {
+               debug("%s: Cannot decode regions\n", __func__);
+               return;
+       }
+
        pci_addr_cells = ofnode_read_simple_addr_cells(node);
        addr_cells = ofnode_read_simple_addr_cells(parent_node);
        size_cells = ofnode_read_simple_size_cells(node);
@@ -883,7 +886,7 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
        bd_t *bd = gd->bd;
 
        if (!bd)
-               return 0;
+               return;
 
        for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
                if (bd->bi_dram[i].size) {
@@ -908,13 +911,12 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
                        base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 #endif
 
-       return 0;
+       return;
 }
 
 static int pci_uclass_pre_probe(struct udevice *bus)
 {
        struct pci_controller *hose;
-       int ret;
 
        debug("%s, bus=%d/%s, parent=%s\n", __func__, bus->seq, bus->name,
              bus->parent->name);
@@ -923,12 +925,7 @@ static int pci_uclass_pre_probe(struct udevice *bus)
        /* For bridges, use the top-level PCI controller */
        if (!device_is_on_pci_bus(bus)) {
                hose->ctlr = bus;
-               ret = decode_regions(hose, dev_ofnode(bus->parent),
-                                    dev_ofnode(bus));
-               if (ret) {
-                       debug("%s: Cannot decode regions\n", __func__);
-                       return ret;
-               }
+               decode_regions(hose, dev_ofnode(bus->parent), dev_ofnode(bus));
        } else {
                struct pci_controller *parent_hose;