config SOC_K3_J721E
bool "TI's K3 based J721E SoC Family Support"
+config SOC_K3_AM642
+ bool "TI's K3 based AM642 SoC Family Support"
+
endchoice
config SYS_SOC
hex
default 0x80000 if SOC_K3_AM6
default 0x100000 if SOC_K3_J721E
+ default 0x1c0000 if SOC_K3_AM642
help
- Describes the total size of the MCU MSRAM. This doesn't
- specify the total size of SPL as ROM can use some part
- of this RAM. Once ROM gives control to SPL then this
- complete size can be usable.
+ Describes the total size of the MCU or OCMC MSRAM present on
+ the SoC in use. This doesn't specify the total size of SPL as
+ ROM can use some part of this RAM. Once ROM gives control to
+ SPL then this complete size can be usable.
config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
hex
default 0x58000 if SOC_K3_AM6
default 0xc0000 if SOC_K3_J721E
+ default 0x180000 if SOC_K3_AM642
help
Describes the maximum size of the image that ROM can download
from any boot media.
hex
default 0x41c7fbfc if SOC_K3_AM6
default 0x41cffbfc if SOC_K3_J721E
+ default 0x701bebfc if SOC_K3_AM642
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o
+obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
obj-$(CONFIG_ARM64) += arm64-mmu.o
obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
obj-$(CONFIG_TI_SECURE_DEVICE) += security.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM642: SoC specific initialization
+ *
+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+ * Keerthy <j-keerthy@ti.com>
+ * Dave Gerlach <d-gerlach@ti.com>
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <asm/io.h>
+#include "common.h"
+
+#if defined(CONFIG_SPL_BUILD)
+
+void board_init_f(ulong dummy)
+{
+#if defined(CONFIG_CPU_V7R)
+ setup_k3_mpu_regions();
+#endif
+
+ /* Init DM early */
+ spl_early_init();
+
+ preloader_console_init();
+}
+#endif