microblaze: Fix byteorder for microblaze

Just remove ancient code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
Reviewed-by: Marek Vasut <marex@denx.de>

diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index b2757a41f8a43205d33abe10d7d3db7ad36ccf96..f3a471d1b2be308f69b86c8576be98d3feda359c 100644 (file)
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -20,29 +20,6 @@
 
 #ifdef __GNUC__
 
-/* This is effectively a dupe of the arch-independent byteswap
-   code in include/linux/byteorder/swab.h, however we force a cast
-   of the result up to 32 bits.  This in turn forces the compiler
-   to explicitly clear the high 16 bits, which it wasn't doing otherwise.
-
-   I think this is a symptom of a bug in mb-gcc.  JW 20040303
-*/
-
-
-static __inline__ __u16 ___arch__swab16 (__u16 half_word)
-{
-       /* 32 bit temp to cast result, forcing clearing of high word */
-       __u32 temp;
-
-       temp = ((half_word & 0x00FFU) << 8) | ((half_word & 0xFF00U) >> 8);
-
-       return (__u16) temp;
-}
-
-#define __arch__swab16(x) ___arch__swab16(x)
-
-/* Microblaze has no arch-specific endian conversion insns */
-
 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
 #  define __BYTEORDER_HAS_U64__
 #  define __SWAB_64_THRU_32__