]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
clk: renesas: Make reset controller modemr register offset configurable
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Sun, 25 Apr 2021 19:53:05 +0000 (21:53 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 21 May 2021 13:00:17 +0000 (15:00 +0200)
The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.

Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
20 files changed:
drivers/clk/renesas/clk-rcar-gen2.c
drivers/clk/renesas/clk-rcar-gen3.c
drivers/clk/renesas/r8a774a1-cpg-mssr.c
drivers/clk/renesas/r8a774b1-cpg-mssr.c
drivers/clk/renesas/r8a774c0-cpg-mssr.c
drivers/clk/renesas/r8a774e1-cpg-mssr.c
drivers/clk/renesas/r8a7790-cpg-mssr.c
drivers/clk/renesas/r8a7791-cpg-mssr.c
drivers/clk/renesas/r8a7792-cpg-mssr.c
drivers/clk/renesas/r8a7794-cpg-mssr.c
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c
drivers/clk/renesas/r8a77970-cpg-mssr.c
drivers/clk/renesas/r8a77980-cpg-mssr.c
drivers/clk/renesas/r8a77990-cpg-mssr.c
drivers/clk/renesas/r8a77995-cpg-mssr.c
drivers/clk/renesas/rcar-gen2-cpg.h
drivers/clk/renesas/rcar-gen3-cpg.h
drivers/clk/renesas/renesas-cpg-mssr.h

index b423c9414b2ef2c48a21aa49f5beb7b6762cae9f..b0164a6486d936a4ae0232a3aeb12f284f8d2ce1 100644 (file)
@@ -23,8 +23,6 @@
 #include "renesas-cpg-mssr.h"
 #include "rcar-gen2-cpg.h"
 
-#define CPG_RST_MODEMR         0x0060
-
 #define CPG_PLL0CR             0x00d8
 #define CPG_SDCKCR             0x0074
 
index 763e268937f0eb02d26de2fb8aa076b7fed30187..938d98546baf7f18143b5e610da2e0fc790452c8 100644 (file)
@@ -25,8 +25,6 @@
 #include "renesas-cpg-mssr.h"
 #include "rcar-gen3-cpg.h"
 
-#define CPG_RST_MODEMR         0x0060
-
 #define CPG_PLL0CR             0x00d8
 #define CPG_PLL2CR             0x002c
 #define CPG_PLL4CR             0x01f4
@@ -382,7 +380,7 @@ int gen3_clk_probe(struct udevice *dev)
        if (rst_base == FDT_ADDR_T_NONE)
                return -EINVAL;
 
-       cpg_mode = readl(rst_base + CPG_RST_MODEMR);
+       cpg_mode = readl(rst_base + info->reset_modemr_offset);
 
        priv->cpg_pll_config =
                (struct rcar_gen3_cpg_pll_config *)info->get_pll_config(cpg_mode);
index ef2bb6d777e41bd449b73cf0e9ff9e801cf05975..48da65cd3d0058db0e732620c16bb643279b5594 100644 (file)
@@ -321,6 +321,7 @@ static const struct cpg_mssr_info r8a774a1_cpg_mssr_info = {
        .mstp_table             = r8a774a1_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a774a1_mstp_table),
        .reset_node             = "renesas,r8a774a1-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index a8b242dc471a939bae76f9cf92830ca8ec786a7b..418c393a20c53e764597c0624e9dd76c73e3b1b3 100644 (file)
@@ -318,6 +318,7 @@ static const struct cpg_mssr_info r8a774b1_cpg_mssr_info = {
        .mstp_table             = r8a774b1_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a774b1_mstp_table),
        .reset_node             = "renesas,r8a774b1-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index 6e9558a107c8792a1fbe9ff7b69c5b410f547819..c1283d2614c7a89bb898476ae8f5fe28602d3efe 100644 (file)
@@ -292,6 +292,7 @@ const struct cpg_mssr_info r8a774c0_cpg_mssr_info = {
        .mstp_table             = r8a774c0_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a774c0_mstp_table),
        .reset_node             = "renesas,r8a774c0-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
        .clk_extalr_id          = ~0,
index c969ec688833c502fc15280516783e916fa51b7e..0cacd8d0c8283ee706a4a352419d5e885f8c7d58 100644 (file)
@@ -332,6 +332,7 @@ static const struct cpg_mssr_info r8a774e1_cpg_mssr_info = {
        .mstp_table             = r8a774e1_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a774e1_mstp_table),
        .reset_node             = "renesas,r8a774e1-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index 8d616476c7188eea3494c30377df55405e3de7f3..1f3477fa6e5124990fe78e771dc25901bfd2570e 100644 (file)
@@ -263,6 +263,7 @@ static const struct cpg_mssr_info r8a7790_cpg_mssr_info = {
        .mstp_table             = r8a7790_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7790_mstp_table),
        .reset_node             = "renesas,r8a7790-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extal_usb_node         = "usb_extal",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index 7a89613b32dcaa49942d8f3aa49cb9f235762649..fcca7be8865104f929fb8e3a88965dc3bbeaa65a 100644 (file)
@@ -265,6 +265,7 @@ static const struct cpg_mssr_info r8a7791_cpg_mssr_info = {
        .mstp_table             = r8a7791_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7791_mstp_table),
        .reset_node             = "renesas,r8a7791-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extal_usb_node         = "usb_extal",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index e18774dae4e568c56ae7c7fd15a0a36aebca77c7..5b333638ac06a9f73320a8dce92676131f5f53bc 100644 (file)
@@ -213,6 +213,7 @@ static const struct cpg_mssr_info r8a7792_cpg_mssr_info = {
        .mstp_table             = r8a7792_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7792_mstp_table),
        .reset_node             = "renesas,r8a7792-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
        .pll0_div               = 2,
index 790bc1bbd924f5ab3d91828d0094f779a1cf3f3f..b9dd88de98ea2a44c054c380ab50dd15c8b3b507 100644 (file)
@@ -240,6 +240,7 @@ static const struct cpg_mssr_info r8a7794_cpg_mssr_info = {
        .mstp_table             = r8a7794_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7794_mstp_table),
        .reset_node             = "renesas,r8a7794-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extal_usb_node         = "usb_extal",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index ca742502762849283f037ebf392474219910c032..6ba796b98c3bbe631c241a8cc117fbad9e4c1ac1 100644 (file)
@@ -362,6 +362,7 @@ static const struct cpg_mssr_info r8a7795_cpg_mssr_info = {
        .mstp_table             = r8a7795_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7795_mstp_table),
        .reset_node             = "renesas,r8a7795-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index 2e9a8b6448eb106712a950ec7bcd35da8397d86d..e318719033b130b730b42134f296348bc771d26a 100644 (file)
@@ -346,6 +346,7 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
        .mstp_table             = r8a7796_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a7796_mstp_table),
        .reset_node             = "renesas,r8a7796-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index a839ffa41f7335efb30c0db74db783fd82a1fe66..0a15617da825329e8369135615da95cdc9a1c963 100644 (file)
@@ -344,6 +344,7 @@ static const struct cpg_mssr_info r8a77965_cpg_mssr_info = {
        .mstp_table             = r8a77965_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a77965_mstp_table),
        .reset_node             = "renesas,r8a77965-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index 3b84c658f7c2ae83c6a15210bd8235609ca1217c..a85bed61929577c7d96b3c150b6514c2a5c92302 100644 (file)
@@ -211,6 +211,7 @@ static const struct cpg_mssr_info r8a77970_cpg_mssr_info = {
        .mstp_table             = r8a77970_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a77970_mstp_table),
        .reset_node             = "renesas,r8a77970-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index cf96309d121374504611bead2c456f6ec8c2b118..bd9d7c9be50fa53ddabbb43203369aef1fe85927 100644 (file)
@@ -230,6 +230,7 @@ static const struct cpg_mssr_info r8a77980_cpg_mssr_info = {
        .mstp_table             = r8a77980_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a77980_mstp_table),
        .reset_node             = "renesas,r8a77980-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .extalr_node            = "extalr",
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
index d953c0b421899eee81b4f92d9ab9f85f4fe6f4cc..67a1f586e2ae7e25a487ac4d1c0a9da454701377 100644 (file)
@@ -304,6 +304,7 @@ static const struct cpg_mssr_info r8a77990_cpg_mssr_info = {
        .mstp_table             = r8a77990_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a77990_mstp_table),
        .reset_node             = "renesas,r8a77990-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
        .clk_extalr_id          = ~0,
index 0771c489646bce9d7f5dfcf77bc29c373eb866ac..83e8e9bfaa187e76920f463e425dd5ced00fba49 100644 (file)
@@ -242,6 +242,7 @@ static const struct cpg_mssr_info r8a77995_cpg_mssr_info = {
        .mstp_table             = r8a77995_mstp_table,
        .mstp_table_size        = ARRAY_SIZE(r8a77995_mstp_table),
        .reset_node             = "renesas,r8a77995-rst",
+       .reset_modemr_offset    = CPG_RST_MODEMR,
        .mod_clk_base           = MOD_CLK_BASE,
        .clk_extal_id           = CLK_EXTAL,
        .clk_extalr_id          = ~0,
index 2739480dad92048b6a59e039ea8c2fac31329b19..ca7c3ed6b5447531a185b695129241f03df4f594 100644 (file)
@@ -30,6 +30,8 @@ struct rcar_gen2_cpg_pll_config {
        unsigned int pll0_mult;         /* leave as zero if PLL0CR exists */
 };
 
+#define CPG_RST_MODEMR         0x060
+
 struct gen2_clk_priv {
        void __iomem            *base;
        struct cpg_mssr_info    *info;
index 52526a0caba91d43ec9cc3d73a359ed6984434a9..4fce0a9946576242d514b20fbf984f90d4732184 100644 (file)
@@ -71,6 +71,8 @@ struct rcar_gen3_cpg_pll_config {
        u8 osc_prediv;
 };
 
+#define CPG_RST_MODEMR 0x060
+
 #define CPG_RPCCKCR    0x238
 #define CPG_RCKCR      0x240
 
index b669dec594ffa2d7ac732650d0b3be31fa85b0c5..ad5d269fc49b001036b966fcb9eba61f4dcd75fc 100644 (file)
@@ -22,6 +22,7 @@ struct cpg_mssr_info {
        const struct mstp_stop_table    *mstp_table;
        unsigned int                    mstp_table_size;
        const char                      *reset_node;
+       unsigned int                    reset_modemr_offset;
        const char                      *extalr_node;
        const char                      *extal_usb_node;
        unsigned int                    mod_clk_base;