fix: phy: marvell: cp110: fix comphy lane 4 selection options

The comphy configuration is incorrect.
Set the correct values for SGMII.

In addition, remove xaui from the comment as it is not supported.

Signed-off-by: Yoav Gvili <ygvili@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>

diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 056de83d1535569c179ca03b78bcb8f8b198f876..8ea5df22d896ee48de261e8e00175e7edbc0ad04 100644 (file)
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -34,7 +34,7 @@ struct utmi_phy_data {
  * PIPE selector include USB and PCIe options.
  * PHY selector include the Ethernet and SATA options, every Ethernet
  * option has different options, for example: serdes lane2 had option
- * Eth_port_0 that include (SGMII0, XAUI0, RXAUI0, SFI)
+ * Eth_port_0 that include (SGMII0, RXAUI0, SFI)
  */
 struct comphy_mux_data cp110_comphy_phy_mux_data[] = {
        {4, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII1, 0x1}, /* Lane 0 */
@@ -46,9 +46,9 @@ struct comphy_mux_data cp110_comphy_phy_mux_data[] = {
             {PHY_TYPE_SATA0, 0x4} } },
        {8, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_RXAUI1, 0x1}, /* Lane 3 */
             {PHY_TYPE_SGMII1, 0x2}, {PHY_TYPE_SATA1, 0x4} } },
-       {7, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII2, 0x1}, /* Lane 4 */
+       {7, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII0, 0x2}, /* Lane 4 */
             {PHY_TYPE_RXAUI0, 0x2}, {PHY_TYPE_SFI, 0x2},
-            {PHY_TYPE_SGMII1, 0x2} } },
+            {PHY_TYPE_SGMII1, 0x1} } },
        {6, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII2, 0x1}, /* Lane 5 */
             {PHY_TYPE_RXAUI1, 0x2}, {PHY_TYPE_SATA1, 0x4} } },
 };