x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/Kconfig b/arch/Kconfig
index 54de91afb34b83a6d9a5cdfb704267190ca10fb2..ae9c93ed7b12f9a8c0f32ec91d81d874f3609731 100644 (file)
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -193,6 +193,7 @@ config X86
        imply SPL_OF_LIBFDT
        imply SPL_DRIVERS_MISC_SUPPORT
        imply SPL_GPIO_SUPPORT
+       imply SPL_PINCTRL
        imply SPL_LIBCOMMON_SUPPORT
        imply SPL_LIBGENERIC_SUPPORT
        imply SPL_SERIAL_SUPPORT
@@ -206,6 +207,7 @@ config X86
        imply TPL_DM
        imply TPL_DRIVERS_MISC_SUPPORT
        imply TPL_GPIO_SUPPORT
+       imply TPL_PINCTRL
        imply TPL_LIBCOMMON_SUPPORT
        imply TPL_LIBGENERIC_SUPPORT
        imply TPL_SERIAL_SUPPORT

diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 74b7e9a20766b75cc2529ae4dad22b62c5af84bf..403b754ce9ac8379e01ff3abfb9108821083a135 100644 (file)
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -72,6 +72,8 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_TPL_MISC=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
+# CONFIG_SPL_PINCTRL is not set
+# CONFIG_TPL_PINCTRL is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SOUND=y
 CONFIG_SOUND_I8254=y