arm: dts: Add Mercury+ AA1 devicetrees

Devicetree headers for Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi
new file mode 100644 (file)
index 0000000..365e051
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10-u-boot.dtsi"
+
+/ {
+       chosen {
+               firmware-loader = <&fs_loader0>;
+       };
+
+       fs_loader0: fs-loader {
+               u-boot,dm-pre-reloc;
+               compatible = "u-boot,fs-loader";
+               phandlepart = <&mmc 1>;
+       };
+};
+
+&atsha204a {
+       u-boot,dm-pre-reloc;
+};
+
+&fpga_mgr {
+       u-boot,dm-pre-reloc;
+       altr,bitstream = "fpga.itb";
+};
+
+&i2c1 {
+       u-boot,dm-pre-reloc;
+};
+
+&main_sdmmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&mmc {
+       u-boot,dm-pre-reloc;
+};
+
+&peri_sdmmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc_free_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+       u-boot,dm-pre-reloc;
+};

diff --git a/arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi
new file mode 100644 (file)
index 0000000..fee1fc3
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10.dtsi"
+
+/ {
+       aliases {
+               ethernet0 = &gmac0;
+               serial1 = &uart1;
+       };
+
+       chosen {
+               stdout-path = "serial1:115200n8";
+       };
+
+       memory@0 {
+               name = "memory";
+               device_type = "memory";
+               reg = <0x0 0x80000000>; /* 2GB */
+       };
+};
+
+&gmac0 {
+       phy-mode = "rgmii";
+       phy-handle = <&phy3>;
+
+       max-frame-size = <3800>;
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy3: ethernet-phy@3 {
+                       reg = <3>;
+                       txd0-skew-ps = <0>; /* -420ps */
+                       txd1-skew-ps = <0>; /* -420ps */
+                       txd2-skew-ps = <0>; /* -420ps */
+                       txd3-skew-ps = <0>; /* -420ps */
+                       rxd0-skew-ps = <420>; /* 0ps */
+                       rxd1-skew-ps = <420>; /* 0ps */
+                       rxd2-skew-ps = <420>; /* 0ps */
+                       rxd3-skew-ps = <420>; /* 0ps */
+                       txen-skew-ps = <0>; /* -420ps */
+                       txc-skew-ps = <1860>; /* 960ps */
+                       rxdv-skew-ps = <420>; /* 0ps */
+                       rxc-skew-ps = <1680>; /* 780ps */
+               };
+       };
+};
+
+&i2c1 {
+       atsha204a: atsha204a@64 {
+               compatible = "atmel,atsha204a";
+               reg = <0x64>;
+       };
+
+       isl12022: isl12022@6f {
+               compatible = "isil,isl12022";
+               reg = <0x6f>;
+       };
+};
+
+&mmc {
+       cap-sd-highspeed;
+       broken-cd;
+       bus-width = <4>;
+};
+
+&osc1 {
+       clock-frequency = <33330000>;
+};