]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
imx9: Calculate DDR size from DDRC setting
authorYe Li <ye.li@nxp.com>
Fri, 28 Apr 2023 04:08:45 +0000 (12:08 +0800)
committerStefano Babic <sbabic@denx.de>
Sun, 21 May 2023 14:54:41 +0000 (16:54 +0200)
To avoid using static setting for ECC enabled DDR size, switch
to calculate DDR size from DDRC setting

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
arch/arm/mach-imx/imx9/soc.c

index 6ae7e704895f636f04ae2f3dc007764e73761785..64e8ac610e5e8a00784048e27fc031bbcbe159f3 100644 (file)
@@ -36,6 +36,7 @@
 #include <asm/arch-imx/cpu.h>
 #include <asm/mach-imx/s400_api.h>
 #include <fuse.h>
+#include <asm/arch/ddr.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -327,14 +328,26 @@ void enable_caches(void)
 
 __weak int board_phys_sdram_size(phys_size_t *size)
 {
+       phys_size_t start, end;
+       phys_size_t val;
+
        if (!size)
                return -EINVAL;
 
-       *size = PHYS_SDRAM_SIZE;
+       val = readl(REG_DDR_CS0_BNDS);
+       start = (val >> 16) << 24;
+       end   = (val & 0xFFFF);
+       end   = end ? end + 1 : 0;
+       end   = end << 24;
+       *size = end - start;
+
+       val = readl(REG_DDR_CS1_BNDS);
+       start = (val >> 16) << 24;
+       end   = (val & 0xFFFF);
+       end   = end ? end + 1 : 0;
+       end   = end << 24;
+       *size += end - start;
 
-#ifdef PHYS_SDRAM_2_SIZE
-       *size += PHYS_SDRAM_2_SIZE;
-#endif
        return 0;
 }