sunxi: SPL SPI: Add SPI boot support for the Allwinner R40 SoC

Now that we can easily select an SoC specific SPI0 base address, adding
support for the Allwinner R40 is fairly trivial:
We set the base address, add this SoC to the ones that use PC23 and
enable it in Kconfig.

This allows booting from SPI flash on R40 boards.

Tested on a Bananapi M2 Berry with SPI flash connected to the header pins.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 3a3b6734301e3dae2d11431b35b0e58dfb89fdca..eb046160e633e24ffe34625227767ce7cdcf780e 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -994,7 +994,7 @@ config SPL_STACK_R_ADDR
 
 config SPL_SPI_SUNXI
        bool "Support for SPI Flash on Allwinner SoCs in SPL"
-       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40
        help
          Enable support for SPI Flash. This option allows SPL to read from
          sunxi SPI Flash. It uses the same method as the boot ROM, so does

diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index cab6affe8d1022eb6e9dd2603db9b9ada4989c6f..357953cfcef89cfa1f0abe621afcacbfe1726c29 100644 (file)
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -94,7 +94,8 @@ static void spi0_pinmux_setup(unsigned int pin_function)
        for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++)
                sunxi_gpio_set_cfgpin(pin, pin_function);
 
-       if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I))
+       if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I) ||
+           IS_ENABLED(CONFIG_MACH_SUN8I_R40))
                sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_function);
        else
                sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_function);
@@ -107,6 +108,9 @@ static bool is_sun6i_gen_spi(void)
 
 static uintptr_t spi0_base_address(void)
 {
+       if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
+               return 0x01C05000;
+
        if (!is_sun6i_gen_spi())
                return 0x01C05000;