powerpc/t104xrdb: support deep sleep in SPI/SD boot

Add deep sleep support in SPI/SD boot. The destination address
second stage uboot image is loaded to is changed because
currently this address will be used by kernel which means
we can't reserve it for resume.

Entry point to kernel is still placed in second stage uboot.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 3665ec6b6c8fb7a93f804ec808d3075c3db6c231..3222e26a5aa3e2ab66fc348ceb8e3782918d92c3 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -134,6 +134,21 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
                        printf("Failed to reserve memory for spin table: %s\n",
                                fdt_strerror(off));
        }
+#ifdef CONFIG_DEEP_SLEEP
+#ifdef CONFIG_SPL_MMC_BOOT
+       off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
+               CONFIG_SYS_MMC_U_BOOT_SIZE);
+       if (off < 0)
+               printf("Failed to reserve memory for SD deep sleep: %s\n",
+                      fdt_strerror(off));
+#elif defined(CONFIG_SPL_SPI_BOOT)
+       off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
+               CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
+       if (off < 0)
+               printf("Failed to reserve memory for SPI deep sleep: %s\n",
+                      fdt_strerror(off));
+#endif
+#endif
 }
 #endif
 

diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index c628c95f2d2dda0f3783f60281760c671dff2ba9..3822a377384df220301b5c6ad224c46633090b3f 100644 (file)
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -11,6 +11,7 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <spi_flash.h>
+#include <asm/mpc85xx_gpio.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,6 +56,11 @@ void board_init_f(ulong bootflag)
        /* Update GD pointer */
        gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
 
+#ifdef CONFIG_DEEP_SLEEP
+       /* disable the console if boot from deep sleep */
+       if (in_be32(&gur->scrtsr[0]) & (1 << 3))
+               gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+#endif
        /* compiler optimization barrier needed for GCC >= 3.4 */
        __asm__ __volatile__("" : : : "memory");
 
@@ -120,3 +126,16 @@ void board_init_r(gd_t *gd, ulong dest_addr)
        nand_boot();
 #endif
 }
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+       void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+       /* does not provide HW signals for power management */
+       clrbits_8(cpld_base + 0x17, 0x40);
+       /* Disable MCKE isolation */
+       gpio_set_value(2, 0);
+       udelay(1);
+}
+#endif

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 89e20b1a31030241bcc3019028370a0495d96e81..0ee0ff242d32c224b9723b63b7b3ae6f35f30582 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -32,7 +32,7 @@
 #define CONFIG_SPL_I2C_SUPPORT
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
-#define CONFIG_SYS_TEXT_BASE           0x00201000
+#define CONFIG_SYS_TEXT_BASE           0x30001000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
 #define CONFIG_SPL_MAX_SIZE            0x28000
@@ -48,21 +48,21 @@
 #ifdef CONFIG_NAND
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
+#define CONFIG_SYS_NAND_U_BOOT_DST     0x30000000
+#define CONFIG_SYS_NAND_U_BOOT_START   0x30000000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #define CONFIG_SPL_NAND_BOOT
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
+#define        CONFIG_RESET_VECTOR_ADDRESS             0x30000FFC
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x00200000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x30000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x30000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (256 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD
@@ -72,12 +72,12 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
+#define        CONFIG_RESET_VECTOR_ADDRESS             0x30000FFC
 #define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_MMC_MINIMAL
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
-#define CONFIG_SYS_MMC_U_BOOT_DST      (0x00200000)
-#define CONFIG_SYS_MMC_U_BOOT_START    (0x00200000)
+#define CONFIG_SYS_MMC_U_BOOT_DST      (0x30000000)
+#define CONFIG_SYS_MMC_U_BOOT_START    (0x30000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (260 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD