return (rmobile_get_prr() & 0x00007F00) >> 8;
}
-u32 rmobile_get_cpu_rev_integer(void)
+u32 renesas_get_cpu_rev_integer(void)
{
const u32 prr = rmobile_get_prr();
const u32 rev = prr & PRR_MASK;
return ((prr & 0x000000F0) >> 4) + 1;
}
-u32 rmobile_get_cpu_rev_fraction(void)
+u32 renesas_get_cpu_rev_fraction(void)
{
const u32 prr = rmobile_get_prr();
const u32 rev = prr & PRR_MASK;
return get_tfa_info()->cpu_type;
}
-u32 rmobile_get_cpu_rev_integer(void)
+u32 renesas_get_cpu_rev_integer(void)
{
return (readl(SYSC_LSI_DEVID) >> 28) + 1;
}
-u32 rmobile_get_cpu_rev_fraction(void)
+u32 renesas_get_cpu_rev_fraction(void)
{
return 0;
}
{
return 0;
}
-u32 rmobile_get_cpu_rev_integer(void)
+u32 renesas_get_cpu_rev_integer(void)
__attribute__((weak, alias("__rmobile_get_cpu_rev_integer")));
static u32 __rmobile_get_cpu_rev_fraction(void)
{
return 0;
}
-u32 rmobile_get_cpu_rev_fraction(void)
+u32 renesas_get_cpu_rev_fraction(void)
__attribute__((weak, alias("__rmobile_get_cpu_rev_fraction")));
/* CPU information table */
int i = rmobile_cpuinfo_idx();
if (rmobile_cpuinfo[i].cpu_type == RMOBILE_CPU_TYPE_R8A7796 &&
- rmobile_get_cpu_rev_integer() == 1 &&
- rmobile_get_cpu_rev_fraction() == 1) {
+ renesas_get_cpu_rev_integer() == 1 &&
+ renesas_get_cpu_rev_fraction() == 1) {
printf("CPU: Renesas Electronics %s rev 1.1/1.2\n", get_cpu_name(i));
return 0;
}
printf("CPU: Renesas Electronics %s rev %d.%d\n",
- get_cpu_name(i), rmobile_get_cpu_rev_integer(),
- rmobile_get_cpu_rev_fraction());
+ get_cpu_name(i), renesas_get_cpu_rev_integer(),
+ renesas_get_cpu_rev_fraction());
return 0;
}
#define R8A7790_CUT_ES2X 2
#define IS_R8A7790_ES2() \
- (rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
+ (renesas_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7790_H */
#define R8A7791_CUT_ES2X 2
#define IS_R8A7791_ES2() \
- (rmobile_get_cpu_rev_integer() == R8A7791_CUT_ES2X)
+ (renesas_get_cpu_rev_integer() == R8A7791_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7791_H */
#define R8A7793_CUT_ES2X 2
#define IS_R8A7793_ES2() \
- (rmobile_get_cpu_rev_integer() == R8A7793_CUT_ES2X)
+ (renesas_get_cpu_rev_integer() == R8A7793_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7793_H */
#define R8A7794_CUT_ES2 2
#define IS_R8A7794_ES2() \
- (rmobile_get_cpu_rev_integer() == R8A7794_CUT_ES2)
+ (renesas_get_cpu_rev_integer() == R8A7794_CUT_ES2)
#endif /* __ASM_ARCH_R8A7794_H */
const u8 *rzg_get_cpu_name(void);
u32 renesas_get_cpu_type(void);
-u32 rmobile_get_cpu_rev_integer(void);
-u32 rmobile_get_cpu_rev_fraction(void);
+u32 renesas_get_cpu_rev_integer(void);
+u32 renesas_get_cpu_rev_fraction(void);
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_RMOBILE_H */
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.4GHz */
- if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
+ if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
void qos_init(void)
{
- if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
+ if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
qos_init_es2();
else
qos_init_es1();
void qos_init(void)
{
- if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
+ if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
qos_init_es2();
else
qos_init_es1();
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.4GHz */
- if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
+ if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
/* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() <= 2)) ||
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() <= 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
plat->cfg.host_caps &= ~MMC_MODE_HS400;
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() >= 2)) ||
+ (renesas_get_cpu_rev_integer() >= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 2)) ||
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7);
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() > 2)) {
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() > 2)) {
priv->adjust_hs400_enable = true;
priv->adjust_hs400_offset = 3;
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
/* M3W+ bad taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 3))
+ (renesas_get_cpu_rev_integer() == 3))
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
/* M3N can use HS400 with manual adjustment */
/* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 2)) ||
+ (renesas_get_cpu_rev_integer() <= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() <= 3)))
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() <= 3)))
priv->nrtaps = 4;
else
priv->nrtaps = 8;
#endif
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0)))
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
else
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc)
{
/* Initialize TDSEL on old revisions */
- if ((rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0))
+ if ((renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060088, 0x00155554);
return 0;
static int r8a7794_pinmux_soc_init(struct sh_pfc *pfc)
{
/* Initialize TDSEL on old revisions */
- if ((rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0))
+ if ((renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060068, 0x55555500);
return 0;
* 7: On other R-Car Gen3
* 15: On R-Car Gen4
*/
- if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && rmobile_get_cpu_rev_integer() == 1)
+ if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
return RPC_PHYCNT_STRTIM(6);
else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 ||
cpu_type == RMOBILE_CPU_TYPE_R8A779G0 ||