rockchip: remove the hard coded uart iomux setting for px5 evb

As the debug uart is marked as dm-pre-reloc, the pinctrl driver
will handle the correct iomux setting.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
index 6dca1fc74b92b32c3bd87377347f76c639693700..6a47642b575f4db188614d3dec5c472036bab0fa 100644 (file)
--- a/board/rockchip/evb_px5/evb-px5.c
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -4,30 +4,6 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
-#include <asm/io.h>
-#include <fdtdec.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int mach_cpu_init(void)
-{
-       struct rk3368_pmu_grf *pmugrf;
-       int node;
-
-       node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rk3368-pmugrf");
-       pmugrf = (struct rk3368_pmu_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
-
-       rk_clrsetreg(&pmugrf->gpio0d_iomux,
-                    GPIO0D0_MASK | GPIO0D1_MASK |
-                    GPIO0D2_MASK | GPIO0D3_MASK,
-                    GPIO0D0_GPIO << GPIO0D0_SHIFT |
-                    GPIO0D1_GPIO << GPIO0D1_SHIFT |
-                    GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
-                    GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
-       return 0;
-}
 
 int board_init(void)
 {