ARM: dts: uniphier: sync Device Trees with upstream Linux

I periodically sync Device Trees for better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index 7d59112ddd1d11f26139385188c952d56a69e3f0..b0b2b57bb969aa8e88e970b4661daf26e5c532c6 100644 (file)
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -22,6 +22,7 @@
                #size-cells = <1>;
                ranges;
                interrupt-parent = <&intc>;
+               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -65,9 +66,12 @@
 
                system_bus: system-bus@58c00000 {
                        compatible = "socionext,uniphier-system-bus";
+                       status = "disabled";
                        reg = <0x58c00000 0x400>;
                        #address-cells = <2>;
                        #size-cells = <1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_system_bus>;
                };
 
                smpctrl@59800000 {
@@ -109,9 +113,15 @@
                        interrupt-controller;
                };
 
-               pinctrl: pinctrl@5f801000 {
-                       /* specify compatible in each SoC DTSI */
-                       reg = <0x5f801000 0xe00>;
+               soc-glue@5f800000 {
+                       compatible = "simple-mfd", "syscon";
+                       reg = <0x5f800000 0x2000>;
+                       u-boot,dm-pre-reloc;
+
+                       pinctrl: pinctrl {
+                               /* specify compatible in each SoC DTSI */
+                               u-boot,dm-pre-reloc;
+                       };
                };
 
                sysctrl: sysctrl@61840000 {
@@ -124,8 +134,12 @@
 
                nand: nand@68000000 {
                        compatible = "denali,denali-nand-dt";
-                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       status = "disabled";
                        reg-names = "nand_data", "denali_reg";
+                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       interrupts = <0 65 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
                };
        };
 };

diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
index b148e9fbd90df1a300caa0fd303e7e9a0490b748..4eb7664a9e4d93dea477214aa1566810b9373734 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for UniPhier PH1-LD11 Reference Board
  *
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+        X11
  */
@@ -62,20 +63,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi
index e485f90a97a0c48c6ef69ef2f9dd211bafc2e9d2..8901a79790bdffa1c6cd875e50f57bb02ae22330 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi
@@ -1,11 +1,14 @@
 /*
  * Device Tree Source for UniPhier PH1-LD11 SoC
  *
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+        X11
  */
 
+/memreserve/ 0x80000000 0x00000008;    /* cpu-release-addr */
+
 / {
        compatible = "socionext,ph1-ld11";
        #address-cells = <2>;
@@ -16,24 +19,41 @@
                #address-cells = <2>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu-map {
+                       cluster0 {
+                               core0 {
+                                       cpu = <&cpu0>;
+                               };
+                               core1 {
+                                       cpu = <&cpu1>;
+                               };
+                       };
+               };
+
+               cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x000>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x001>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
        };
 
        clocks {
+               refclk: ref {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <25000000>;
+               };
+
                uart_clk: uart_clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
@@ -60,6 +80,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
+               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -183,6 +204,8 @@
                        reg = <0x58c00000 0x400>;
                        #address-cells = <2>;
                        #size-cells = <1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_system_bus>;
                };
 
                smpctrl@59800000 {
@@ -226,9 +249,15 @@
                        #clock-cells = <1>;
                };
 
-               pinctrl: pinctrl@5f801000 {
-                       compatible = "socionext,ph1-ld11-pinctrl", "syscon";
-                       reg = <0x5f801000 0xe00>;
+               soc-glue@5f800000 {
+                       compatible = "simple-mfd", "syscon";
+                       reg = <0x5f800000 0x2000>;
+                       u-boot,dm-pre-reloc;
+
+                       pinctrl: pinctrl {
+                               compatible = "socionext,uniphier-ld11-pinctrl";
+                               u-boot,dm-pre-reloc;
+                       };
                };
 
                gic: interrupt-controller@5fe00000 {

diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
index 3049016cc7b6d39844e97816d5748a0479361d70..90c8705fffadf1735aa6566e5629a929d9a3c534 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
@@ -51,20 +51,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi
index f9cc3c4bdbcbf1119a243675ff0272dea6812b96..f5cced5bf6a5ac0dd824e170477cdbb2e48bd0f3 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi
@@ -6,6 +6,8 @@
  * SPDX-License-Identifier:    GPL-2.0+        X11
  */
 
+/memreserve/ 0x80000000 0x00000008;    /* cpu-release-addr */
+
 / {
        compatible = "socionext,ph1-ld20";
        #address-cells = <2>;
@@ -41,7 +43,7 @@
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0 0x000>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
 
                cpu1: cpu@1 {
@@ -49,7 +51,7 @@
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0 0x001>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
 
                cpu2: cpu@100 {
@@ -57,7 +59,7 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x100>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
 
                cpu3: cpu@101 {
@@ -65,11 +67,17 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x101>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0 0x80000100>;
+                       cpu-release-addr = <0 0x80000000>;
                };
        };
 
        clocks {
+               refclk: ref {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <25000000>;
+               };
+
                uart_clk: uart_clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
@@ -96,6 +104,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
+               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -219,6 +228,8 @@
                        reg = <0x58c00000 0x400>;
                        #address-cells = <2>;
                        #size-cells = <1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_system_bus>;
                };
 
                smpctrl@59800000 {
@@ -243,9 +254,15 @@
                        bus-width = <4>;
                };
 
-               pinctrl: pinctrl@5f801000 {
-                       compatible = "socionext,ph1-ld20-pinctrl", "syscon";
-                       reg = <0x5f801000 0xe00>;
+               soc-glue@5f800000 {
+                       compatible = "simple-mfd", "syscon";
+                       reg = <0x5f800000 0x2000>;
+                       u-boot,dm-pre-reloc;
+
+                       pinctrl: pinctrl {
+                               compatible = "socionext,uniphier-ld20-pinctrl";
+                               u-boot,dm-pre-reloc;
+                       };
                };
 
                gic: interrupt-controller@5fe00000 {

diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
index 6cae452d7da010d443bf36c1e83e1c94014b960a..36de7e3a0f9680c1cec5b6abc52e8df69727080f 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
@@ -69,20 +69,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 5ae029ea97e5412fae0812a3d5ac38a91c3d41c9..5629b7df7fd4df3d0fe84928f9f8cfacae211a50 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -310,7 +310,7 @@
 };
 
 &pinctrl {
-       compatible = "socionext,ph1-ld4-pinctrl", "syscon";
+       compatible = "socionext,uniphier-ld4-pinctrl";
 };
 
 &sysctrl {

diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
index e2a2a8c5ce18785c8d7e08ccccac44c8c69f8377..e29a6ea841f1d6ea6c6c964d96d339cec85fde3a 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
@@ -71,20 +71,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-ld6b.dtsi b/arch/arm/dts/uniphier-ph1-ld6b.dtsi
index cf02e620219abc9d087242871930fc6994385e1e..e8110eefcec41306d541d4db7302113fe1c1e4d9 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld6b.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld6b.dtsi
@@ -17,7 +17,7 @@
        compatible = "socionext,ph1-ld6b";
 };
 
-/* UART3 unavilable: the pads are not wired to the package balls */
+/* UART3 unavailable: the pads are not wired to the package balls */
 &serial3 {
        status = "disabled";
 };
@@ -27,5 +27,5 @@
  * which makes the pinctrl driver unshareable.
  */
 &pinctrl {
-       compatible = "socionext,ph1-ld6b-pinctrl", "syscon";
+       compatible = "socionext,uniphier-ld6b-pinctrl";
 };

diff --git a/arch/arm/dts/uniphier-ph1-pro4-ace.dts b/arch/arm/dts/uniphier-ph1-pro4-ace.dts
index 37e0853365c0fef6f4473e83650084132b955062..d8740cc9d33f3a2d8f536719a0f3654ad187a52e 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-ace.dts
@@ -90,20 +90,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
index 5be76e2d66e84025548736aa4fce314b6ae17d0a..4a2de08e0668b357dd42f03060a59f73c0cabcd7 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
@@ -80,20 +80,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
index 82e2bd02c70a9788bc991ebc6fe104b89965421e..965fe08e3880bc1d08eafd423387cb62bbb5802c 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
@@ -85,12 +85,6 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
@@ -103,10 +97,6 @@
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index d5767b625214551a4d8f1c3dde76c4153a7aefc9..080fcedc3ea18b698a07179d9b821a5506b7bb2c 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -452,7 +452,7 @@
 };
 
 &pinctrl {
-       compatible = "socionext,ph1-pro4-pinctrl", "syscon";
+       compatible = "socionext,uniphier-pro4-pinctrl";
 };
 
 &sysctrl {

diff --git a/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts
index cbdc3ebbffaeebfe1cd852a0da670c1d4d4f9886..682b7958fa2573dacc1a19321c4456b01c053da6 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts
+++ b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts
@@ -56,20 +56,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial1 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart1 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index bd1b4b1b66f946028579c2f4286e3dfb6c0c5b33..5b7f6e87e7877a0485cd54f96e9cb70ad65c2b1f 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -431,7 +431,7 @@
 };
 
 &pinctrl {
-       compatible = "socionext,ph1-pro5-pinctrl", "syscon";
+       compatible = "socionext,uniphier-pro5-pinctrl";
 };
 
 &sysctrl {

diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
index 8ceb93e9f5d4867f4fa917e27bedf53b023d7f5b..9af012cab79ea0c048ddb16cfb8915982c53e6d2 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
@@ -73,20 +73,10 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial0 {
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart0 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 61e0b457818ff21ad0631f34932cf1a5a912aa6f..f07a1d1bb5f58045f51c459bf6afbd314ef0a591 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -310,7 +310,7 @@
 };
 
 &pinctrl {
-       compatible = "socionext,ph1-sld8-pinctrl", "syscon";
+       compatible = "socionext,uniphier-sld8-pinctrl";
 };
 
 &sysctrl {

diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi
index 2d36f98514a78dd37cffc88420531fd54f98c270..2810f3b3e1cccc5b133595cf3d4b7676d46b7804 100644 (file)
--- a/arch/arm/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/dts/uniphier-pinctrl.dtsi
@@ -47,6 +47,11 @@
                function = "nand";
        };
 
+       pinctrl_nand2cs: nand2cs_grp {
+               groups = "nand", "nand_cs1";
+               function = "nand";
+       };
+
        pinctrl_sd: sd_grp {
                groups = "sd";
                function = "sd";
@@ -67,6 +72,11 @@
                function = "sd1";
        };
 
+       pinctrl_system_bus: system_bus_grp {
+               groups = "system_bus", "system_bus_cs1";
+               function = "system_bus";
+       };
+
        pinctrl_uart0: uart0_grp {
                groups = "uart0";
                function = "uart0";

diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts
index eb1d2bcc63a087fd66d14a92371ae3f96bc1a142..61f61641afc1078e8d015836f95a19b45257d263 100644 (file)
--- a/arch/arm/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts
@@ -65,12 +65,6 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial2 {
        u-boot,dm-pre-reloc;
 };
@@ -83,10 +77,6 @@
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart2 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts
index e7d5db8894218936de84330a8ab8fe82430da9e1..3d5b300716021d405261f97fbe46ce36b5505515 100644 (file)
--- a/arch/arm/dts/uniphier-proxstream2-vodka.dts
+++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts
@@ -50,12 +50,6 @@
 };
 
 /* for U-Boot only */
-/ {
-       soc {
-               u-boot,dm-pre-reloc;
-       };
-};
-
 &serial2 {
        u-boot,dm-pre-reloc;
 };
@@ -68,10 +62,6 @@
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
-       u-boot,dm-pre-reloc;
-};
-
 &pinctrl_uart2 {
        u-boot,dm-pre-reloc;
 };

diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index 12968bdd17e2e4af4a7c253d3c44d44ea0ab0cf1..0a8c049d74757e3d8d86b724d343ecc9c56d054e 100644 (file)
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -435,7 +435,7 @@
 };
 
 &pinctrl {
-       compatible = "socionext,proxstream2-pinctrl", "syscon";
+       compatible = "socionext,uniphier-pxs2-pinctrl";
 };
 
 &sysctrl {

diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi
index b8960fdc5884af2bfe355dc74f4d4d9563c4ea3f..6d25104281dd442dd55e9339be9d659095f59f82 100644 (file)
--- a/arch/arm/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/dts/uniphier-ref-daughter.dtsi
@@ -7,7 +7,7 @@
  */
 
 &i2c0 {
-       eeprom {
+       eeprom@50 {
                compatible = "microchip,24lc128", "i2c-eeprom";
                reg = <0x50>;
                u-boot,i2c-offset-len = <2>;