Makefile: socfpga: Add target to generate hex output for combined spl and dtb

Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel
SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex"
is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It
combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to
generate the final configuration bitstream for Intel SOCFPGA SOC64
devices.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>

diff --git a/Makefile b/Makefile
index 68ce5195b224d3c47be08193f30c43beac9c60ed..d6eda45385c35977916b903aff43492380e9d4f6 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1264,11 +1264,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
                $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
                $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
 
-OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex)
-
-spl/u-boot-spl.hex: spl/u-boot-spl FORCE
-       $(call if_changed,objcopy)
-
 binary_size_check: u-boot-nodtb.bin FORCE
        @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
        map_size=$(shell cat u-boot.map | \
@@ -1940,6 +1935,12 @@ spl/u-boot-spl.bin: spl/u-boot-spl
        @:
        $(SPL_SIZE_CHECK)
 
+spl/u-boot-spl-dtb.bin: spl/u-boot-spl
+       @:
+
+spl/u-boot-spl-dtb.hex: spl/u-boot-spl
+       @:
+
 spl/u-boot-spl: tools prepare \
                $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
                $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)

diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 0e546012578552e7fb628155f14b9e4efdc9e43a..1cfa1900478700cce4af2d7325798f9a62612e35 100644 (file)
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -194,7 +194,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl.hex"
+#define CONFIG_SPL_TARGET              "spl/u-boot-spl-dtb.hex"
 #define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_INIT_RAM_SIZE
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 #define CONFIG_SPL_BSS_MAX_SIZE                0x100000        /* 1 MB */

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ea4e045769c7c8651ca5333bc63675b4918277fa..1fd63efdfd365d6e5a2f13a78fe6713a9d4a14ce 100644 (file)
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -229,6 +229,8 @@ ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),)
 INPUTS-y       += $(obj)/$(SPL_BIN).sfp
 endif
 
+INPUTS-$(CONFIG_TARGET_SOCFPGA_SOC64) += $(obj)/u-boot-spl-dtb.hex
+
 ifdef CONFIG_ARCH_SUNXI
 INPUTS-y       += $(obj)/sunxi-spl.bin
 
@@ -389,6 +391,11 @@ $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
 MKIMAGEFLAGS_sunxi-spl.bin = -T sunxi_egon \
        -n $(CONFIG_DEFAULT_DEVICE_TREE)
 
+OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE)
+
+$(obj)/u-boot-spl-dtb.hex: $(obj)/u-boot-spl-dtb.bin FORCE
+       $(call if_changed,objcopy)
+
 $(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin FORCE
        $(call if_changed,mkimage)