]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
dm: test: Add a test for of-platdata phandles
authorSimon Glass <sjg@chromium.org>
Sat, 3 Oct 2020 17:31:32 +0000 (11:31 -0600)
committerSimon Glass <sjg@chromium.org>
Thu, 29 Oct 2020 20:42:18 +0000 (14:42 -0600)
We have a test in dtoc for this feature, but not one in U-Boot itself.
Add a simple test that checks that the information comes through
correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/sandbox/dts/sandbox.dtsi
configs/sandbox_spl_defconfig
drivers/clk/clk_fixed_rate.c
drivers/clk/clk_sandbox.c
test/dm/of_platdata.c

index 0faad3f3195429299ea7dc6d65a00a5235218eb5..6a0338b212bdd57a457a12459c16e332c646afc0 100644 (file)
                };
        };
 
+       clk_fixed: clk-fixed {
+               u-boot,dm-pre-reloc;
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <1234>;
+       };
+
+       clk_sandbox: clk-sbox {
+               u-boot,dm-pre-reloc;
+               compatible = "sandbox,clk";
+               #clock-cells = <1>;
+               assigned-clocks = <&clk_sandbox 3>;
+               assigned-clock-rates = <321>;
+       };
+
+       clk-test {
+               u-boot,dm-pre-reloc;
+               compatible = "sandbox,clk-test";
+               clocks = <&clk_fixed>,
+                        <&clk_sandbox 1>,
+                        <&clk_sandbox 0>,
+                        <&clk_sandbox 3>,
+                        <&clk_sandbox 2>;
+               clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
+       };
+
        gpio_a: gpios@0 {
                u-boot,dm-pre-reloc;
                gpio-controller;
index f59e4f2e68c58ccb1cbeaee2ab4ac52b88605ca8..db723cdf983702b117a143c47a9428add582bcd4 100644 (file)
@@ -104,6 +104,7 @@ CONFIG_ADC_SANDBOX=y
 CONFIG_AXI=y
 CONFIG_AXI_SANDBOX=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_CPU=y
 CONFIG_DM_DEMO=y
 CONFIG_DM_DEMO_SIMPLE=y
index 55e1f8caa520fb496749ce8d5df047f0eaf789f6..f86b4a0e924630df661bda2ab50c14191fde841c 100644 (file)
@@ -46,8 +46,8 @@ static const struct udevice_id clk_fixed_rate_match[] = {
        { /* sentinel */ }
 };
 
-U_BOOT_DRIVER(clk_fixed_rate) = {
-       .name = "fixed_rate_clock",
+U_BOOT_DRIVER(fixed_clock) = {
+       .name = "fixed_clock",
        .id = UCLASS_CLK,
        .of_match = clk_fixed_rate_match,
        .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
index 768fbb7c52030f58e8c996ef464bdb7af03d46e6..0ff1b4963385555172701da66badd5b20ca4611e 100644 (file)
@@ -124,8 +124,8 @@ static const struct udevice_id sandbox_clk_ids[] = {
        { }
 };
 
-U_BOOT_DRIVER(clk_sandbox) = {
-       .name           = "clk_sandbox",
+U_BOOT_DRIVER(sandbox_clk) = {
+       .name           = "sandbox_clk",
        .id             = UCLASS_CLK,
        .of_match       = sandbox_clk_ids,
        .ops            = &sandbox_clk_ops,
index 80900e416ba8832eb426cb5244cdd6d7d34e5a23..57f903611a687b96c903009c3eeeae73099fe731 100644 (file)
@@ -26,7 +26,11 @@ static int dm_test_of_platdata_props(struct unit_test_state *uts)
        struct udevice *dev;
        int i;
 
+       /* Skip the clock */
        ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+       ut_asserteq_str("sandbox_clk_test", dev->name);
+
+       ut_assertok(uclass_next_device_err(&dev));
        plat = dev_get_platdata(dev);
        ut_assert(plat->boolval);
        ut_asserteq(1, plat->intval);
@@ -167,3 +171,36 @@ static int dm_test_of_platdata_dev(struct unit_test_state *uts)
        return 0;
 }
 DM_TEST(dm_test_of_platdata_dev, UT_TESTF_SCAN_PDATA);
+
+/* Test handling of phandles that point to other devices */
+static int dm_test_of_platdata_phandle(struct unit_test_state *uts)
+{
+       struct dtd_sandbox_clk_test *plat;
+       struct udevice *dev, *clk;
+
+       ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+       ut_asserteq_str("sandbox_clk_test", dev->name);
+       plat = dev_get_platdata(dev);
+
+       ut_assertok(device_get_by_driver_info(plat->clocks[0].node, &clk));
+       ut_asserteq_str("fixed_clock", clk->name);
+
+       ut_assertok(device_get_by_driver_info(plat->clocks[1].node, &clk));
+       ut_asserteq_str("sandbox_clk", clk->name);
+       ut_asserteq(1, plat->clocks[1].arg[0]);
+
+       ut_assertok(device_get_by_driver_info(plat->clocks[2].node, &clk));
+       ut_asserteq_str("sandbox_clk", clk->name);
+       ut_asserteq(0, plat->clocks[2].arg[0]);
+
+       ut_assertok(device_get_by_driver_info(plat->clocks[3].node, &clk));
+       ut_asserteq_str("sandbox_clk", clk->name);
+       ut_asserteq(3, plat->clocks[3].arg[0]);
+
+       ut_assertok(device_get_by_driver_info(plat->clocks[4].node, &clk));
+       ut_asserteq_str("sandbox_clk", clk->name);
+       ut_asserteq(2, plat->clocks[4].arg[0]);
+
+       return 0;
+}
+DM_TEST(dm_test_of_platdata_phandle, UT_TESTF_SCAN_PDATA);