]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A
authorSean Anderson <sean.anderson@seco.com>
Fri, 22 Apr 2022 08:31:36 +0000 (14:01 +0530)
committerPriyanka Jain <priyanka.jain@nxp.com>
Tue, 26 Apr 2022 11:42:32 +0000 (17:12 +0530)
This erratum is reported to cause problems on these processors [1-3].
The problem is usually with the clocking, which is supposed to be
configured by the RCW [4]. However, if it is not set, or if the default
clocking is not correct, then this erratum will cause an SError.
However, according to Ran Wang in [1]:
" ... this erratum is used to pass USB compliance test only, you could
 disable this workaround on your board if you don't any USB issue on
 normal use case, I think it's fine."

So just disable this erratum by default for these processors.

[1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/
[2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993
[3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412
[4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/cpu/armv7/ls102xa/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/Kconfig

index ef1f45650f3ed113bade388923a62228755bee90..c496e6439199125cddb3a5c0d04578c7a3494aff 100644 (file)
@@ -7,7 +7,6 @@ config ARCH_LS1021A
        select SYS_FSL_ERRATUM_A008407
        select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR
        select SYS_FSL_ERRATUM_A008997 if USB
-       select SYS_FSL_ERRATUM_A009007 if USB
        select SYS_FSL_ERRATUM_A009008 if USB
        select SYS_FSL_ERRATUM_A009663
        select SYS_FSL_ERRATUM_A009798 if USB
index 5ea99c459ce730375f87c3e9cbe15355e0a495eb..dd953803dcd418adf3acfb8e27e48a07136daaae 100644 (file)
@@ -74,7 +74,6 @@ config ARCH_LS1043A
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A008850 if !TFABOOT
        select SYS_FSL_ERRATUM_A008997
-       select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_ERRATUM_A009008
        select SYS_FSL_ERRATUM_A009660 if !TFABOOT
        select SYS_FSL_ERRATUM_A009663 if !TFABOOT
@@ -112,7 +111,6 @@ config ARCH_LS1046A
        select SYS_FSL_ERRATUM_A008511 if !TFABOOT
        select SYS_FSL_ERRATUM_A008850 if !TFABOOT
        select SYS_FSL_ERRATUM_A008997
-       select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_ERRATUM_A009008
        select SYS_FSL_ERRATUM_A009798
        select SYS_FSL_ERRATUM_A009801