board: AM335x-ICEv2: Add pinmux support

Add necessary pinmux support for AM335x ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index fdf827fe541da70136a6155fa6b4c95bbe905d4e..8afa5f9b4052b1a374ff1873fe222fc6ce1bed54 100644 (file)
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -135,6 +135,11 @@ static struct module_pin_mux gpio0_7_pin_mux[] = {
        {-1},
 };
 
+static struct module_pin_mux gpio0_18_pin_mux[] = {
+       {OFFSET(usb0_drvvbus), (MODE(7) | PULLUDEN)},   /* GPIO0_18 */
+       {-1},
+};
+
 static struct module_pin_mux rgmii1_pin_mux[] = {
        {OFFSET(mii1_txen), MODE(2)},                   /* RGMII1_TCTL */
        {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},        /* RGMII1_RCTL */
@@ -172,6 +177,20 @@ static struct module_pin_mux mii1_pin_mux[] = {
        {-1},
 };
 
+static struct module_pin_mux rmii1_pin_mux[] = {
+       {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},        /* MDIO_CLK */
+       {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+       {OFFSET(mii1_crs), MODE(1) | RXACTIVE},         /* MII1_CRS */
+       {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},       /* MII1_RXERR */
+       {OFFSET(mii1_txen), MODE(1)},                   /* MII1_TXEN */
+       {OFFSET(mii1_txd1), MODE(1)},                   /* MII1_TXD1 */
+       {OFFSET(mii1_txd0), MODE(1)},                   /* MII1_TXD0 */
+       {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},        /* MII1_RXD1 */
+       {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},        /* MII1_RXD0 */
+       {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},     /* RMII1_REFCLK */
+       {-1},
+};
+
 #ifdef CONFIG_NAND
 static struct module_pin_mux nand_pin_mux[] = {
        {OFFSET(gpmc_ad0),      (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0  */
@@ -237,6 +256,12 @@ static struct module_pin_mux bone_norcape_pin_mux[] = {
 };
 #endif
 
+static struct module_pin_mux uart3_icev2_pin_mux[] = {
+       {OFFSET(mii1_rxd3), (MODE(1) | PULLUP_EN | RXACTIVE)},  /* UART3_RXD */
+       {OFFSET(mii1_rxd2), MODE(1) | PULLUDEN},                /* UART3_TXD */
+       {-1},
+};
+
 #if defined(CONFIG_NOR_BOOT)
 void enable_norboot_pin_mux(void)
 {
@@ -365,6 +390,12 @@ void enable_board_pin_mux(void)
 #else
                configure_module_pin_mux(mmc1_pin_mux);
 #endif
+       } else if (board_is_icev2()) {
+               configure_module_pin_mux(mmc0_pin_mux);
+               configure_module_pin_mux(gpio0_18_pin_mux);
+               configure_module_pin_mux(uart3_icev2_pin_mux);
+               configure_module_pin_mux(rmii1_pin_mux);
+               configure_module_pin_mux(spi0_pin_mux);
        } else {
                puts("Unknown board, cannot configure pinmux.");
                hang();