arm, am335x: make mpu pll config configurable

upcoming support for siemens boards switches mpu pll clk in board
code. So make this configurable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>

diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index a1efc7520a7c149dc93b388ca84bf8fc23ac4ed7..9c4d0b439316c9353774ecb11d0a69d418a389dd 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
@@ -246,7 +246,7 @@ static void enable_per_clocks(void)
                ;
 }
 
-static void mpu_pll_config(void)
+void mpu_pll_config_val(int mpull_m)
 {
        u32 clkmode, clksel, div_m2;
 
@@ -260,7 +260,7 @@ static void mpu_pll_config(void)
                ;
 
        clksel = clksel & (~CLK_SEL_MASK);
-       clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N);
+       clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N);
        writel(clksel, &cmwkup->clkseldpllmpu);
 
        div_m2 = div_m2 & ~CLK_DIV_MASK;
@@ -274,6 +274,11 @@ static void mpu_pll_config(void)
                ;
 }
 
+static void mpu_pll_config(void)
+{
+       mpu_pll_config_val(CONFIG_SYS_MPUCLK);
+}
+
 static void core_pll_config(void)
 {
        u32 clkmode, clksel, div_m4, div_m5, div_m6;

diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 6cce5a5fb3ebd5469467263a0c4f934911bd58d5..cbbb54e39f0edd248c20b3569e6449de176b4f7b 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -32,6 +32,7 @@ extern struct ctrl_stat *cstat;
 u32 get_device_type(void);
 void save_omap_boot_params(void);
 void setup_clocks_for_console(void);
+void mpu_pll_config_val(int mpull_m);
 void ddr_pll_config(unsigned int ddrpll_M);
 
 void sdelay(unsigned long);