MCR boards are plugged in racks. The position in the rack can be read
in a register.
For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.
For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
void misc_init_r_common(void)
{
- u8 tmp, far_id;
+ u8 tmp, far_id, addr;
int count = 3;
switch (in_8(ADDR_FPGA_R_BASE)) {
if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
env_set("bootdelay", "60");
+ addr = in_8(ADDR_FPGA_R_BASE + 0x43);
+ printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+ addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+
env_set("config", CFG_BOARD_MCR3000_2G);
env_set("hostname", CFG_BOARD_MCR3000_2G);
break;
setbits_be32(&immr->im_cpm.cp_pbdir, 0xf);
clrbits_be32(&immr->im_cpm.cp_pbdat, 0x1);
- load_fpga();
+ if (!load_fpga()) {
+ u8 addr = in_be16((void *)0x1400009c);
+
+ printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+ addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+ }
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0)