imx8m: Enable WDOG_B for timeout

When doing reset_cpu, in normal case the WDOG_B outputs immediately
after we clean WDA bit. But on mscale, the WDOG_B may be later than
internal reset, and cause PMIC not reset. As we enabled the SD3.0
support, the PMIC must be reset to reset SD card.

Change the reset_cpu to enable the WDOG_B for timeout as well, and set
WDOG timeout to 1s.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 8b6be7bc1996d28a7f9604b8e5f5052b95495ac2..f10b71c345a2aa08da504aac27f8c9404e464eb0 100644 (file)
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -410,19 +410,19 @@ int ft_system_setup(void *blob, bd_t *bd)
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SYSRESET)
 void reset_cpu(ulong addr)
 {
-       struct watchdog_regs *wdog = (struct watchdog_regs *)addr;
+       struct watchdog_regs *wdog = (struct watchdog_regs *)addr;
 
-       if (!addr)
-              wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+       if (!addr)
+               wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
-       /* Clear WDA to trigger WDOG_B immediately */
-       writew((WCR_WDE | WCR_SRS), &wdog->wcr);
+       /* Clear WDA to trigger WDOG_B immediately */
+       writew((SET_WCR_WT(1) | WCR_WDT | WCR_WDE | WCR_SRS), &wdog->wcr);
 
-       while (1) {
-               /*
-                * spin for .5 seconds before reset
-                */
-       }
+       while (1) {
+               /*
+                * spin for 1 second before timeout reset
+                */
+       }
 }
 #endif